62 lines
2.5 KiB
Diff
62 lines
2.5 KiB
Diff
--- a/drivers/ssb/pci.c
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+++ b/drivers/ssb/pci.c
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@@ -339,6 +339,21 @@ static s8 r123_extract_antgain(u8 sprom_
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return (s8)gain;
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}
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+static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
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+{
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+ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
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+ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
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+ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
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+ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
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+ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
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+ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
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+ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
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+ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
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+ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
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+ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
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+ SSB_SPROM2_MAXP_A_LO_SHIFT);
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+}
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+
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static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
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{
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int i;
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@@ -398,8 +413,7 @@ static void sprom_extract_r123(struct ss
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SSB_SPROM1_ITSSI_A_SHIFT);
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SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
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SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
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- if (out->revision >= 2)
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- SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
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+
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SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
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SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
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@@ -410,6 +424,8 @@ static void sprom_extract_r123(struct ss
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out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
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SSB_SPROM1_AGAIN_A,
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SSB_SPROM1_AGAIN_A_SHIFT);
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+ if (out->revision >= 2)
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+ sprom_extract_r23(out, in);
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}
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/* Revs 4 5 and 8 have partially shared layout */
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--- a/include/linux/ssb/ssb_regs.h
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+++ b/include/linux/ssb/ssb_regs.h
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@@ -289,11 +289,11 @@
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#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
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#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
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#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
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-#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
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-#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
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-#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
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-#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
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-#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
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+#define SSB_SPROM4_ANTAVAIL 0x005C /* Antenna available bitfields */
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+#define SSB_SPROM4_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
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+#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 0
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+#define SSB_SPROM4_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
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+#define SSB_SPROM4_ANTAVAIL_A_SHIFT 8
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#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
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#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
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#define SSB_SPROM4_AGAIN0_SHIFT 0
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