f10f009609
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> SVN-Revision: 42313
415 lines
14 KiB
Diff
415 lines
14 KiB
Diff
From 843da234cfc0e7014f9e2da82786a485e0820665 Mon Sep 17 00:00:00 2001
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From: Thomas Gleixner <tglx@linutronix.de>
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Date: Thu, 13 Mar 2014 15:32:05 +0100
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Subject: [PATCH] irq: Add a new IRQCHIP_EOI_THREADED flag
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This flag must be used in combination with handle_fasteoi_irq, when set
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handle_fasteoi_irq will delay the calling of chip->irq_eoi until the threaded
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handler has run.
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Reviewed-by: Hans de Goede <hdegoede@redhat.com>
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Tested-by: Hans de Goede <hdegoede@redhat.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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include/linux/irq.h | 3 +++
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kernel/irq/chip.c | 48 ++++++++++++++++++++++++++++++++++++++++--------
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kernel/irq/internals.h | 1 +
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kernel/irq/manage.c | 2 +-
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4 files changed, 45 insertions(+), 9 deletions(-)
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diff --git a/include/linux/irq.h b/include/linux/irq.h
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index 7dc1003..0f036fb 100644
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--- a/include/linux/irq.h
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+++ b/include/linux/irq.h
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@@ -349,6 +349,8 @@ struct irq_chip {
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* IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
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* when irq enabled
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* IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
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+ * IRQCHIP_ONESHOT_SAFE: One shot does not require mask/unmask
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+ * IRQCHIP_EOI_THREADED: Chip requires eoi() on unmask in threaded mode
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*/
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enum {
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IRQCHIP_SET_TYPE_MASKED = (1 << 0),
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@@ -357,6 +359,7 @@ enum {
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IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
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IRQCHIP_SKIP_SET_WAKE = (1 << 4),
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IRQCHIP_ONESHOT_SAFE = (1 << 5),
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+ IRQCHIP_EOI_THREADED = (1 << 6),
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};
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/* This include will go away once we isolated irq_desc usage to core code */
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diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
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index dc04c16..6397df2 100644
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--- a/kernel/irq/chip.c
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+++ b/kernel/irq/chip.c
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@@ -281,6 +281,19 @@ void unmask_irq(struct irq_desc *desc)
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}
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}
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+void unmask_threaded_irq(struct irq_desc *desc)
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+{
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+ struct irq_chip *chip = desc->irq_data.chip;
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+
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+ if (chip->flags & IRQCHIP_EOI_THREADED)
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+ chip->irq_eoi(&desc->irq_data);
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+
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+ if (chip->irq_unmask) {
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+ chip->irq_unmask(&desc->irq_data);
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+ irq_state_clr_masked(desc);
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+ }
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+}
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+
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/*
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* handle_nested_irq - Handle a nested irq from a irq thread
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* @irq: the interrupt number
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@@ -435,6 +448,27 @@ static inline void preflow_handler(struct irq_desc *desc)
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static inline void preflow_handler(struct irq_desc *desc) { }
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#endif
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+static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
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+{
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+ if (!(desc->istate & IRQS_ONESHOT)) {
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+ chip->irq_eoi(&desc->irq_data);
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+ return;
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+ }
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+ /*
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+ * We need to unmask in the following cases:
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+ * - Oneshot irq which did not wake the thread (caused by a
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+ * spurious interrupt or a primary handler handling it
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+ * completely).
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+ */
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+ if (!irqd_irq_disabled(&desc->irq_data) &&
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+ irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
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+ chip->irq_eoi(&desc->irq_data);
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+ unmask_irq(desc);
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+ } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
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+ chip->irq_eoi(&desc->irq_data);
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+ }
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+}
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+
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/**
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* handle_fasteoi_irq - irq handler for transparent controllers
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* @irq: the interrupt number
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@@ -448,6 +482,8 @@ static inline void preflow_handler(struct irq_desc *desc) { }
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void
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handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
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{
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+ struct irq_chip *chip = desc->irq_data.chip;
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+
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raw_spin_lock(&desc->lock);
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if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
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@@ -473,18 +509,14 @@ handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
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preflow_handler(desc);
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handle_irq_event(desc);
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- if (desc->istate & IRQS_ONESHOT)
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- cond_unmask_irq(desc);
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+ cond_unmask_eoi_irq(desc, chip);
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-out_eoi:
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- desc->irq_data.chip->irq_eoi(&desc->irq_data);
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-out_unlock:
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raw_spin_unlock(&desc->lock);
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return;
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out:
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- if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
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- goto out_eoi;
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- goto out_unlock;
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+ if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
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+ chip->irq_eoi(&desc->irq_data);
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+ raw_spin_unlock(&desc->lock);
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}
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/**
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diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
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index 001fa5b..e98bb56 100644
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--- a/kernel/irq/internals.h
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+++ b/kernel/irq/internals.h
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@@ -73,6 +73,7 @@ extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu);
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extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu);
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extern void mask_irq(struct irq_desc *desc);
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extern void unmask_irq(struct irq_desc *desc);
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+extern void unmask_threaded_irq(struct irq_desc *desc);
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extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr);
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diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
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index d3bf660..7593958 100644
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--- a/kernel/irq/manage.c
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+++ b/kernel/irq/manage.c
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@@ -718,7 +718,7 @@ static void irq_finalize_oneshot(struct irq_desc *desc,
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if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
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irqd_irq_masked(&desc->irq_data))
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- unmask_irq(desc);
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+ unmask_threaded_irq(desc);
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out_unlock:
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raw_spin_unlock_irq(&desc->lock);
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--
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2.0.3
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From d000f9a5348e6d6c8b620a9c2d0b97c69d6d6153 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Tue, 11 Mar 2014 16:47:46 +0100
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Subject: [PATCH] irqchip: sun4i: Fix irq 0 not working
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SUN4I_IRQ_VECTOR_REG containing 0 can mean one of 3 things:
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1) no more irqs pending
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2) irq 0 pending
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3) spurious irq
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So if we immediately get a reading of 0, check the irq-pending reg
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to differentiate between 2 and 3. We only do this once to avoid
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the extra check in the common case of 1) hapening after having
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read the vector-reg once.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/irqchip/irq-sun4i.c | 18 ++++++++++++++++--
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1 file changed, 16 insertions(+), 2 deletions(-)
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diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
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index a5438d8..5c25048 100644
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--- a/drivers/irqchip/irq-sun4i.c
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+++ b/drivers/irqchip/irq-sun4i.c
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@@ -140,10 +140,24 @@ static asmlinkage void __exception_irq_entry sun4i_handle_irq(struct pt_regs *re
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{
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u32 irq, hwirq;
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+ /*
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+ * hwirq == 0 can mean one of 3 things:
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+ * 1) no more irqs pending
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+ * 2) irq 0 pending
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+ * 3) spurious irq
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+ * So if we immediately get a reading of 0, check the irq-pending reg
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+ * to differentiate between 2 and 3. We only do this once to avoid
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+ * the extra check in the common case of 1 hapening after having
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+ * read the vector-reg once.
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+ */
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hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
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- while (hwirq != 0) {
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+ if (hwirq == 0 &&
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+ !(readl(sun4i_irq_base + SUN4I_IRQ_PENDING_REG(0)) & BIT(0)))
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+ return;
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+
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+ do {
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irq = irq_find_mapping(sun4i_irq_domain, hwirq);
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handle_IRQ(irq, regs);
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hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
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- }
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+ } while (hwirq != 0);
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}
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--
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2.0.3
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From b37587009473582d9fc080e8b8b99b67b0077a90 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Tue, 11 Mar 2014 16:53:23 +0100
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Subject: [PATCH] irqchip: sun4i: Fix a comment about mask register
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initialization
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The comment was claiming that we were masking all irqs, while the code actually
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*un*masks all of them.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/irqchip/irq-sun4i.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
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index 5c25048..8a2fbee 100644
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--- a/drivers/irqchip/irq-sun4i.c
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+++ b/drivers/irqchip/irq-sun4i.c
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@@ -109,7 +109,7 @@ static int __init sun4i_of_init(struct device_node *node,
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writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(1));
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writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(2));
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- /* Mask all the interrupts */
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+ /* Unmask all the interrupts, ENABLE_REG(x) is used for masking */
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writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(0));
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writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(1));
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writel(0, sun4i_irq_base + SUN4I_IRQ_MASK_REG(2));
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--
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2.0.3
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From c8865ee82b74b2d95339370972a0d9bfdbac09cf Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Wed, 12 Mar 2014 17:43:45 +0100
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Subject: [PATCH] irqchip: sun4i: Don't ack IRQs != 0, fix acking of IRQ 0
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All IRQs except for IRQ 0 seem to not need acking, so drop acking for them.
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The ENMI needs to have the ack done *after* clearing the interrupt source,
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otherwise we will get a spurious interrupt for each real interrupt.
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So use the new IRQCHIP_EOI_THREADED flag for this in combination with
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handle_fasteoi_irq. This uses a separate irq_chip struct for IRQ 0,
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since we only want this behavior for IRQ 0.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/irqchip/irq-sun4i.c | 19 ++++++++++++++++---
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1 file changed, 16 insertions(+), 3 deletions(-)
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diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
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index 8a2fbee..a0ed1ea 100644
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--- a/drivers/irqchip/irq-sun4i.c
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+++ b/drivers/irqchip/irq-sun4i.c
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@@ -76,16 +76,29 @@ static void sun4i_irq_unmask(struct irq_data *irqd)
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static struct irq_chip sun4i_irq_chip = {
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.name = "sun4i_irq",
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- .irq_ack = sun4i_irq_ack,
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.irq_mask = sun4i_irq_mask,
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.irq_unmask = sun4i_irq_unmask,
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};
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+/* IRQ 0 / the ENMI needs a late eoi call */
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+static struct irq_chip sun4i_irq_chip_enmi = {
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+ .name = "sun4i_irq",
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+ .irq_eoi = sun4i_irq_ack,
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+ .irq_mask = sun4i_irq_mask,
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+ .irq_unmask = sun4i_irq_unmask,
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+ .flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED,
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+};
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+
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static int sun4i_irq_map(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw)
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{
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- irq_set_chip_and_handler(virq, &sun4i_irq_chip,
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- handle_level_irq);
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+ if (hw == 0)
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+ irq_set_chip_and_handler(virq, &sun4i_irq_chip_enmi,
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+ handle_fasteoi_irq);
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+ else
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+ irq_set_chip_and_handler(virq, &sun4i_irq_chip,
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+ handle_level_irq);
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+
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set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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return 0;
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--
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2.0.3
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From f8b4347aa12d7a30aa1d3e5bfcdccece52d17af3 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Thu, 13 Mar 2014 19:38:26 +0100
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Subject: [PATCH] irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
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Since the sun4i irq chip does not require any action and clears the interrupt
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when the level goes back to inactive, we don't need to mask / unmask for
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non oneshot IRQs, to achieve this we make sun4i_irq_ack a nop for all irqs
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except irq 0 and use handle_fasteoi_irq for all interrupts.
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Now there might be a case when the device reactivates the interrupt
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before the RETI. But that does not matter as we run the primary
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interrupt handlers with interrupts disabled.
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This also allows us to get rid of needing to use 2 irq_chip structs, this
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means that the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED will now influence
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all interrupts rather then just irq 0, but that does not matter as the eoi
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is now a nop anyways for all interrupts but irq 0.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/irqchip/irq-sun4i.c | 18 ++++--------------
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1 file changed, 4 insertions(+), 14 deletions(-)
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diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
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index a0ed1ea..6a8c88d 100644
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--- a/drivers/irqchip/irq-sun4i.c
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+++ b/drivers/irqchip/irq-sun4i.c
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@@ -45,6 +45,9 @@ static void sun4i_irq_ack(struct irq_data *irqd)
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int reg = irq / 32;
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u32 val;
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+ if (irq != 0)
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+ return; /* Only IRQ 0 / the ENMI needs to be acked */
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+
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val = readl(sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
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writel(val | (1 << irq_off),
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sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
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@@ -76,13 +79,6 @@ static void sun4i_irq_unmask(struct irq_data *irqd)
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static struct irq_chip sun4i_irq_chip = {
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.name = "sun4i_irq",
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- .irq_mask = sun4i_irq_mask,
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- .irq_unmask = sun4i_irq_unmask,
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-};
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-
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-/* IRQ 0 / the ENMI needs a late eoi call */
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-static struct irq_chip sun4i_irq_chip_enmi = {
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- .name = "sun4i_irq",
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.irq_eoi = sun4i_irq_ack,
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.irq_mask = sun4i_irq_mask,
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.irq_unmask = sun4i_irq_unmask,
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@@ -92,13 +88,7 @@ static struct irq_chip sun4i_irq_chip_enmi = {
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static int sun4i_irq_map(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw)
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{
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- if (hw == 0)
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- irq_set_chip_and_handler(virq, &sun4i_irq_chip_enmi,
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- handle_fasteoi_irq);
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- else
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- irq_set_chip_and_handler(virq, &sun4i_irq_chip,
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- handle_level_irq);
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-
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+ irq_set_chip_and_handler(virq, &sun4i_irq_chip, handle_fasteoi_irq);
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set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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return 0;
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--
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2.0.3
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From de39bc31eaa554bd044e6adefacd3da6da5bf6e3 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Thu, 13 Mar 2014 20:41:20 +0100
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Subject: [PATCH] irqchip: sun4i: simplify sun4i_irq_ack
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Now that we only ack irq 0 the code can be simplified a lot.
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Also switch from read / modify / write to a simple write clear:
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1) This is what the android code does (it has a hack for acking irq 0
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in its unmask code doing this)
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2) read / modify / write simply does not make sense for an irq status
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register like this, if the other bits are writeable (and the data sheet says
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they are not) they should be write 1 to clear, since otherwise a read /
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modify / write can race with a device raising an interrupt and then clear
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the pending bit unintentionally
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/irqchip/irq-sun4i.c | 7 +------
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1 file changed, 1 insertion(+), 6 deletions(-)
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diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
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index 6a8c88d..75615b5 100644
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--- a/drivers/irqchip/irq-sun4i.c
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+++ b/drivers/irqchip/irq-sun4i.c
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@@ -41,16 +41,11 @@ static asmlinkage void __exception_irq_entry sun4i_handle_irq(struct pt_regs *re
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static void sun4i_irq_ack(struct irq_data *irqd)
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{
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unsigned int irq = irqd_to_hwirq(irqd);
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- unsigned int irq_off = irq % 32;
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- int reg = irq / 32;
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- u32 val;
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if (irq != 0)
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return; /* Only IRQ 0 / the ENMI needs to be acked */
|
|
|
|
- val = readl(sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
|
|
- writel(val | (1 << irq_off),
|
|
- sun4i_irq_base + SUN4I_IRQ_PENDING_REG(reg));
|
|
+ writel(BIT(0), sun4i_irq_base + SUN4I_IRQ_PENDING_REG(0));
|
|
}
|
|
|
|
static void sun4i_irq_mask(struct irq_data *irqd)
|
|
--
|
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2.0.3
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|