36a96a4493
In current state there's huge regression on ipq806x target that causes the device to transmit broken/malformed frames that are not corrected/detected by error control mechanisms and other less severe issues. https://bugs.lede-project.org/index.php?do=details&task_id=1197 This finally had been narrowed down to patch 0071-pcie-qcom-fixes.patch Meanwhile QSDK contains a handful of commits that add support for ipq806x to upstream qcom pcie driver https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/log/drivers/pci/host/pcie-qcom.c?h=eggplant Unfortunately qca developers do not bother to push it upstream. Using those commits instead of lede 0071 patch fixes mentioned issue and probably many others as it seems that corrupted data has been originating within pcie misconfiguration. Fixes: FS#1197 and probably others Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
68 lines
2.1 KiB
Diff
68 lines
2.1 KiB
Diff
From e833cdb5c792912d459773cc23153e5d78875d34 Mon Sep 17 00:00:00 2001
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From: Sham Muthayyan <smuthayy@codeaurora.org>
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Date: Tue, 19 Jul 2016 20:05:25 +0530
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Subject: PCIE: designware: Fixed PCI host init
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Change-Id: I949b302d77199fc09342acf26b7bb45a7ec467ee
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Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
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---
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drivers/pci/host/pcie-designware.c | 9 +++++++--
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drivers/pci/host/pcie-designware.h | 2 +-
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drivers/pci/host/pcie-qcom.c | 5 +++--
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3 files changed, 11 insertions(+), 5 deletions(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -637,8 +637,13 @@ int dw_pcie_host_init(struct pcie_port *
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}
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}
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- if (pp->ops->host_init)
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- pp->ops->host_init(pp);
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+ if (pp->ops->host_init) {
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+ ret = pp->ops->host_init(pp);
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+ if (ret) {
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+ dev_err(pp->dev, "hostinit failed\n");
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+ return 0;
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+ }
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+ }
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pp->root_bus_nr = pp->busn->start;
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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--- a/drivers/pci/host/pcie-designware.h
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+++ b/drivers/pci/host/pcie-designware.h
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@@ -63,7 +63,7 @@ struct pcie_host_ops {
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int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
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unsigned int devfn, int where, int size, u32 val);
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int (*link_up)(struct pcie_port *pp);
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- void (*host_init)(struct pcie_port *pp);
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+ int (*host_init)(struct pcie_port *pp);
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void (*msi_set_irq)(struct pcie_port *pp, int irq);
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void (*msi_clear_irq)(struct pcie_port *pp, int irq);
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phys_addr_t (*get_msi_addr)(struct pcie_port *pp);
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--- a/drivers/pci/host/pcie-qcom.c
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+++ b/drivers/pci/host/pcie-qcom.c
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@@ -515,7 +515,7 @@ static int qcom_pcie_link_up(struct pcie
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return !!(val & PCI_EXP_LNKSTA_DLLLA);
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}
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-static void qcom_pcie_host_init(struct pcie_port *pp)
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+static int qcom_pcie_host_init(struct pcie_port *pp)
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{
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struct qcom_pcie *pcie = to_qcom_pcie(pp);
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int ret;
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@@ -541,12 +541,13 @@ static void qcom_pcie_host_init(struct p
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if (ret)
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goto err;
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- return;
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+ return 0;
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err:
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qcom_ep_reset_assert(pcie);
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phy_power_off(pcie->phy);
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err_deinit:
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pcie->ops->deinit(pcie);
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+ return ret;
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}
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static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
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