87 lines
2.9 KiB
Diff
87 lines
2.9 KiB
Diff
From 370c8181fd848948aeae371bbc1124dc0dead22b Mon Sep 17 00:00:00 2001
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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Date: Thu, 23 May 2013 16:32:53 +0200
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Subject: [PATCH 19/29] pci: mvebu: fix the emulation of the status register
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The status register of the PCI configuration space of PCI-to-PCI
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bridges contain some read-only bits, and so write-1-to-clear bits. So,
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the Linux PCI core sometimes writes 0xffff to this status register,
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and in the current PCI-to-PCI bridge emulation code of the Marvell
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driver, we do take all those 1s being written. Even the read-only bits
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are being overwritten.
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For now, all the read-only bits should be emulated to have the zero
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value.
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The other bits, that are write-1-to-clear bits are used to report
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various kind of errors, and are never set by the emulated bridge, so
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there is no need to support this write-1-to-clear bits mechanism.
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As a conclusion, the easiest solution is to simply emulate this status
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register by returning zero when read, and ignore the writes to it.
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This has two visible effects:
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* The devsel is no longer 'unknown' in, i.e
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Flags: bus master, 66MHz, user-definable features, ?? devsel, latency 0
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becomes:
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Flags: bus master, 66MHz, user-definable features, fast devsel, latency 0
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in lspci -v.
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This was caused by a value of 11b being read for devsel, which is
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an invalid value. This 11b value being read was due to a previous
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write of 0xffff into the status register.
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* The capability list is no longer broken, because we indicate to the
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Linux PCI core that we don't have a Capabilities Pointer in the PCI
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configuration space of this bridge. The following message is
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therefore no longer visible in lspci -v:
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Capabilities: [fc] <chain broken>
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Acked-by: Bjorn Helgaas <bhelgaas@google.com>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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---
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drivers/pci/host/pci-mvebu.c | 5 +----
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1 file changed, 1 insertion(+), 4 deletions(-)
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--- a/drivers/pci/host/pci-mvebu.c
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+++ b/drivers/pci/host/pci-mvebu.c
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@@ -69,7 +69,6 @@ struct mvebu_sw_pci_bridge {
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u16 vendor;
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u16 device;
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u16 command;
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- u16 status;
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u16 class;
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u8 interface;
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u8 revision;
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@@ -359,7 +358,6 @@ static void mvebu_sw_pci_bridge_init(str
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memset(bridge, 0, sizeof(struct mvebu_sw_pci_bridge));
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- bridge->status = PCI_STATUS_CAP_LIST;
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bridge->class = PCI_CLASS_BRIDGE_PCI;
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bridge->vendor = PCI_VENDOR_ID_MARVELL;
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bridge->device = MARVELL_EMULATED_PCI_PCI_BRIDGE_ID;
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@@ -386,7 +384,7 @@ static int mvebu_sw_pci_bridge_read(stru
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break;
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case PCI_COMMAND:
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- *value = bridge->status << 16 | bridge->command;
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+ *value = bridge->command;
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break;
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case PCI_CLASS_REVISION:
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@@ -479,7 +477,6 @@ static int mvebu_sw_pci_bridge_write(str
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switch (where & ~3) {
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case PCI_COMMAND:
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bridge->command = value & 0xffff;
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- bridge->status = value >> 16;
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break;
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case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_1:
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