openwrtv3/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
Adrian Schmutzler 5c5bf8b865
ar71xx: Add support for TP-Link CPE210 v2
This PR adds support for a popular low-cost 2.4GHz N based AP

Specifications:
 - SoC: Qualcomm Atheros QCA9533 (650MHz)
 - RAM: 64MB
 - Storage: 8 MB SPI NOR
 - Wireless: 2.4GHz N based built into SoC 2x2
 - Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN

Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254

Notes:
TP-Link does not use bootstrap registers so without this patch reference
clock detects as 40MHz while it is actually 25MHz.
This is due to messed up bootstrap resistor configuration on the PCB.
Provided GPL code just forces 25MHz reference clock.
That causes booting with completely wrong clocks, for example, CPU tries
to boot at 1040MHz while the stock is 650MHz.
So this PR depends on PR #672 to remove 40MHz reference clock.
Thanks to Sven Eckelmann <sven@narfation.org> for properly patching that.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2018-06-23 16:06:31 +02:00

246 lines
5.9 KiB
C

/*
* TP-LINK CPE210/210 v2/220/510/520 board support
*
* Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
* Copyright (C) 2017 Robert Marko <robimarko@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CPE510_GPIO_LED_LAN0 11
#define CPE510_GPIO_LED_LAN1 12
#define CPE510_GPIO_LED_L1 13
#define CPE510_GPIO_LED_L2 14
#define CPE510_GPIO_LED_L3 15
#define CPE510_GPIO_LED_L4 16
/* All LEDs/button except for link4 are the same for CPE and WBS series */
#define WBS510_GPIO_LED_L4 2
#define CPE510_GPIO_EXTERNAL_LNA0 18
#define CPE510_GPIO_EXTERNAL_LNA1 19
#define CPE510_GPIO_BTN_RESET 4
#define CPE510_KEYS_POLL_INTERVAL 20 /* msecs */
#define CPE510_KEYS_DEBOUNCE_INTERVAL (3 * CPE510_KEYS_POLL_INTERVAL)
/* CPE210 v2 reset GPIO */
#define CPE210_V2_GPIO_BTN_RESET 17
static struct gpio_led cpe510_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:lan1",
.gpio = CPE510_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = CPE510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_led wbs510_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:lan1",
.gpio = CPE510_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = WBS510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_led cpe210_v2_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
.gpio = CPE510_GPIO_LED_LAN0,
.active_low = 1,
}, {
.name = "tp-link:green:link1",
.gpio = CPE510_GPIO_LED_L1,
.active_low = 1,
}, {
.name = "tp-link:green:link2",
.gpio = CPE510_GPIO_LED_L2,
.active_low = 1,
}, {
.name = "tp-link:green:link3",
.gpio = CPE510_GPIO_LED_L3,
.active_low = 1,
}, {
.name = "tp-link:green:link4",
.gpio = CPE510_GPIO_LED_L4,
.active_low = 1,
},
};
static struct gpio_keys_button cpe510_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL,
.gpio = CPE510_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct gpio_keys_button cpe210_v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL,
.gpio = CPE210_V2_GPIO_BTN_RESET,
.active_low = 1,
}
};
static void __init cpe_setup(u8 *mac)
{
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe510_gpio_keys),
cpe510_gpio_keys);
ath79_wmac_set_ext_lna_gpio(0, CPE510_GPIO_EXTERNAL_LNA0);
ath79_wmac_set_ext_lna_gpio(1, CPE510_GPIO_EXTERNAL_LNA1);
ath79_register_m25p80(NULL);
ath79_register_mdio(1, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
}
static void __init cpe210_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio),
cpe510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init cpe510_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio),
cpe510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init wbs_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wbs510_leds_gpio),
wbs510_leds_gpio);
cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
static void __init cpe210_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe210_v2_leds_gpio),
cpe210_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, CPE510_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe210_v2_gpio_keys),
cpe210_v2_gpio_keys);
ath79_register_m25p80(NULL);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
ath79_register_wmac(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_CPE210, "CPE210", "TP-LINK CPE210/220",
cpe210_setup);
MIPS_MACHINE(ATH79_MACH_CPE210_V2, "CPE210V2", "TP-LINK CPE210 v2",
cpe210_v2_setup);
MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE510/520",
cpe510_setup);
MIPS_MACHINE(ATH79_MACH_WBS210, "WBS210", "TP-LINK WBS210",
wbs_setup);
MIPS_MACHINE(ATH79_MACH_WBS510, "WBS510", "TP-LINK WBS510",
wbs_setup);