dfcd340721
Add patches from Hauke adding linux 3.0 compatibility. Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> SVN-Revision: 27187
138 lines
4.6 KiB
Diff
138 lines
4.6 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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@@ -19,6 +19,8 @@
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#include "ar9003_2p2_initvals.h"
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#include "ar9485_initvals.h"
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#include "ar9340_initvals.h"
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+#include "ar9330_1p1_initvals.h"
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+#include "ar9330_1p2_initvals.h"
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/* General hardware code for the AR9003 hadware family */
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@@ -29,7 +31,113 @@
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*/
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static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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{
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- if (AR_SREV_9340(ah)) {
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+ if (AR_SREV_9330_11(ah)) {
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+ /* mac */
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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+ ar9331_1p1_mac_core,
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+ ARRAY_SIZE(ar9331_1p1_mac_core), 2);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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+ ar9331_1p1_mac_postamble,
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+ ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
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+
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+ /* bb */
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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+ ar9331_1p1_baseband_core,
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+ ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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+ ar9331_1p1_baseband_postamble,
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+ ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
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+
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+ /* radio */
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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+ ar9331_1p1_radio_core,
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+ ARRAY_SIZE(ar9331_1p1_radio_core), 2);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
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+
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+ /* soc */
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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+ ar9331_1p1_soc_preamble,
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+ ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
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+ ar9331_1p1_soc_postamble,
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+ ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
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+
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+ /* rx/tx gain */
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar9331_common_rx_gain_1p1,
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+ ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9331_modes_lowest_ob_db_tx_gain_1p1,
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+ ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
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+ 5);
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+
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+ /* additional clock settings */
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+ if (ah->is_clk_25mhz)
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+ INIT_INI_ARRAY(&ah->iniModesAdditional,
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+ ar9331_1p1_xtal_25M,
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+ ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
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+ else
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+ INIT_INI_ARRAY(&ah->iniModesAdditional,
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+ ar9331_1p1_xtal_40M,
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+ ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
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+ } else if (AR_SREV_9330_12(ah)) {
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+ /* mac */
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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+ ar9331_1p2_mac_core,
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+ ARRAY_SIZE(ar9331_1p2_mac_core), 2);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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+ ar9331_1p2_mac_postamble,
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+ ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
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+
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+ /* bb */
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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+ ar9331_1p2_baseband_core,
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+ ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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+ ar9331_1p2_baseband_postamble,
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+ ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
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+
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+ /* radio */
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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+ ar9331_1p2_radio_core,
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+ ARRAY_SIZE(ar9331_1p2_radio_core), 2);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
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+
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+ /* soc */
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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+ ar9331_1p2_soc_preamble,
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+ ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
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+ ar9331_1p2_soc_postamble,
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+ ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
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+
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+ /* rx/tx gain */
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar9331_common_rx_gain_1p2,
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+ ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9331_modes_lowest_ob_db_tx_gain_1p2,
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+ ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
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+ 5);
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+
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+ /* additional clock settings */
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+ if (ah->is_clk_25mhz)
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+ INIT_INI_ARRAY(&ah->iniModesAdditional,
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+ ar9331_1p2_xtal_25M,
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+ ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
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+ else
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+ INIT_INI_ARRAY(&ah->iniModesAdditional,
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+ ar9331_1p2_xtal_40M,
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+ ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
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+ } else if (AR_SREV_9340(ah)) {
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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@@ -659,6 +659,9 @@ static int ar9003_hw_process_ini(struct
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REG_WRITE_ARRAY(&ah->iniModesAdditional,
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modesIndex, regWrites);
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+ if (AR_SREV_9300(ah))
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+ REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
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+
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if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
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REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
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