22b9f99b87
Drop patch that was superseded upstream: ramips/0036-mtd-fix-cfi-cmdset-0002-erase-status-check.patch Drop upstreamed patches: - apm821xx/020-0001-crypto-crypto4xx-remove-bad-list_del.patch - apm821xx/020-0011-crypto-crypto4xx-fix-crypto4xx_build_pdr-crypto4xx_b.patch - ath79/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch - brcm63xx/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch - brcm63xx/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch - generic/backport/080-net-convert-sock.sk_wmem_alloc-from-atomic_t-to-refc.patch - generic/pending/170-usb-dwc2-Fix-DMA-alignment-to-start-at-allocated-boun.patch - generic/pending/900-gen_stats-fix-netlink-stats-padding.patch In 4.14.55, a patch was introduced that breaks ext4 images in some cases. The newly introduced patch backport-4.14/500-ext4-fix-check-to-prevent-initializing-reserved-inod.patch addresses this breakage. Fixes the following CVEs: - CVE-2018-10876 - CVE-2018-10877 - CVE-2018-10879 - CVE-2018-10880 - CVE-2018-10881 - CVE-2018-10882 - CVE-2018-10883 Compile-tested: ath79, octeon, x86/64 Runtime-tested: ath79, octeon, x86/64 Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
38 lines
1.3 KiB
Diff
38 lines
1.3 KiB
Diff
From 5f01733dc755dfadfa51b7b3c6c160e632fc6002 Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Tue, 24 Jul 2018 15:09:36 +0200
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Subject: [PATCH 1/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document
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This patch adds the binding documentation for the HS/SS USB PHY found
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inside Qualcom Dakota SoCs.
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
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@@ -0,0 +1,21 @@
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+Qualcom Dakota HS/SS USB PHY
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+
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+Required properties:
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+ - compatible: "qcom,usb-ss-ipq4019-phy",
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+ "qcom,usb-hs-ipq4019-phy"
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+ - reg: offset and length of the registers
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+ - #phy-cells: should be 0
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+ - resets: the reset controllers as listed below
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+ - reset-names: the names of the reset controllers
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+ "por_rst" - the POR reset line for SS and HS phys
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+ "srif_rst" - the SRIF reset line for HS phys
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+Example:
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+
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+hsphy@a8000 {
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+ compatible = "qcom,usb-hs-ipq4019-phy";
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+ phy-cells = <0>;
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+ reg = <0xa8000 0x40>;
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+ resets = <&gcc USB2_HSPHY_POR_ARES>,
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+ <&gcc USB2_HSPHY_S_ARES>;
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+ reset-names = "por_rst", "srif_rst";
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+};
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