openwrtv3/target/linux/ramips/dts/ZBT-APE522II.dts
Roger Pueyo Centelles 5fba0f0c0c ramips: add suport for ZBT APE522II
The ZBT APE522II is a dual-radio outdoor CPE based on the MT7620a SoC. It has
64 MB RAM, 8 MB flash, 2 Fast Ethernet ports via internal switch (one with
802.3af 48V PoE support), a 802.11b/g/n SoC 2.4 GHz radio and an 802.11a/n/ac
MT7612E-based 5 GHz radio.

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
2016-06-22 19:32:06 +02:00

143 lines
2 KiB
Text

/dts-v1/;
#include "mt7620a.dtsi"
/ {
compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
model = "ZBT-APE522II";
chosen {
bootargs = "console=ttyS0,115200";
};
gpio-leds {
compatible = "gpio-leds";
sys1 {
label = "zbt-ape522ii:green:sys1";
gpios = <&gpio0 11 1>;
};
sys2 {
label = "zbt-ape522ii:green:sys2";
gpios = <&gpio0 12 1>;
};
sys3 {
label = "zbt-ape522ii:green:sys3";
gpios = <&gpio0 9 1>;
};
sys4 {
label = "zbt-ape522ii:green:sys4";
gpios = <&gpio0 14 1>;
};
wlan2g4 {
label = "zbt-ape522ii:green:wlan2g4";
gpios = <&gpio3 0 1>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 2 0>;
linux,code = <0x198>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
linux,modalias = "m25p80", "w25q64";
spi-max-frequency = <10000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xf80000>;
};
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "wllll";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pcie {
status = "okay";
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
mediatek,2ghz = <0>;
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "wled", "i2c", "uartf", "wdt";
ralink,function = "gpio";
};
pa {
ralink,group = "pa";
ralink,function = "pa";
};
};
};