openwrtv3/target/linux/ramips/dts/WL-351.dts
L. D. Pinney 70b192f573 ramips: update device tree source files
Use the GPIO dt-bindings macros and add compatible strings in the
ramips device tree source files.

Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
2017-08-03 19:37:40 +02:00

125 lines
2.2 KiB
Text

/dts-v1/;
#include "rt3050.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "sitecom,wl-351", "ralink,rt3052-soc";
model = "Sitecom WL-351 v1 002";
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x3b0000>;
};
};
gpio-leds {
compatible = "gpio-leds";
power {
label = "wl-351:amber:power";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
unpopulated {
label = "wl-351:amber:unpopulated";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
unpopulated2 {
label = "wl-351:blue:unpopulated";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
rtl8366rb {
compatible = "realtek,rtl8366rb";
gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
ralink,function = "gpio";
};
rgmii {
ralink,group = "rgmii";
ralink,function = "rgmii";
};
};
};
&ethernet {
mtd-mac-address = <&factory 0x4>;
};
&esw {
ralink,rgmii = <1>;
mediatek,portmap = <0x3f>;
ralink,fct2 = <0x0002500c>;
/*
* ext phy base addr 31, rx/tx clock skew 0,
* turbo mii off, rgmi 3.3v off, port 5 polling off
* port5: enabled, gige, full-duplex, rx/tx-flow-control
* port6: enabled, gige, full-duplex, rx/tx-flow-control
*/
ralink,fpa2 = <0x1f003fff>;
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&otg {
status = "okay";
};