377 lines
10 KiB
Diff
377 lines
10 KiB
Diff
From 70fc4b2a6200ef7a1b99a6aa28234b919f23b43c Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 26 Nov 2011 21:33:41 +0100
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Subject: [PATCH 184/186] USB: Add driver for the bcma bus
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This adds a USB driver using the generic platform device driver for the
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USB controller found on the Broadcom bcma bus. The bcma bus just
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exposes one device which serves the OHCI and the EHCI controller at the
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same time. This driver probes for this USB controller and creates and
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registers two new platform devices which will be probed by the new
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generic platform device driver. This makes it possible to use the EHCI
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and the OCHI controller on the bcma bus at the same time.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/usb/host/Kconfig | 12 ++
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drivers/usb/host/Makefile | 1 +
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drivers/usb/host/bcma-hcd.c | 328 +++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 341 insertions(+), 0 deletions(-)
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create mode 100644 drivers/usb/host/bcma-hcd.c
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -618,3 +618,15 @@ config USB_PXA168_EHCI
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help
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Enable support for Marvell PXA168 SoC's on-chip EHCI
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host controller
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+
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+config USB_HCD_BCMA
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+ tristate "BCMA usb host driver"
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+ depends on BCMA && EXPERIMENTAL
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+ select USB_OHCI_HCD_PLATFORM if USB_OHCI_HCD
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+ select USB_EHCI_HCD_PLATFORM if USB_EHCI_HCD
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+ help
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+ Enbale support for the EHCI and OCHI host controller on an bcma bus.
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+ It converts the bcma driver into two platform device drivers
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+ for ehci and ohci.
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+
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+ If unsure, say N.
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--- a/drivers/usb/host/Makefile
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+++ b/drivers/usb/host/Makefile
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@@ -37,3 +37,4 @@ obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd
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obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
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obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
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obj-$(CONFIG_MIPS_ALCHEMY) += alchemy-common.o
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+obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
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--- /dev/null
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -0,0 +1,328 @@
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+/*
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+ * Broadcom specific Advanced Microcontroller Bus
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+ * Broadcom USB-core driver (BCMA bus glue)
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+ *
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+ * Copyright 2011 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Based on ssb-ohci driver
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+ * Copyright 2007 Michael Buesch <m@bues.ch>
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+ *
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+ * Derived from the OHCI-PCI driver
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+ * Copyright 1999 Roman Weissgaerber
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+ * Copyright 2000-2002 David Brownell
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+ * Copyright 1999 Linus Torvalds
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+ * Copyright 1999 Gregory P. Smith
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+ *
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+ * Derived from the USBcore related parts of Broadcom-SB
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+ * Copyright 2005-2011 Broadcom Corporation
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+#include <linux/bcma/bcma.h>
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+#include <linux/delay.h>
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+#include <linux/platform_device.h>
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+#include <linux/module.h>
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+#include <linux/usb/hci_driver.h>
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+
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+MODULE_AUTHOR("Hauke Mehrtens");
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+MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
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+MODULE_LICENSE("GPL");
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+
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+struct bcma_hcd_device {
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+ struct platform_device *ehci_dev;
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+ struct platform_device *ohci_dev;
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+};
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+
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+/* Wait for bitmask in a register to get set or cleared.
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+ * timeout is in units of ten-microseconds.
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+ */
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+static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
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+ int timeout)
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+{
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+ int i;
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+ u32 val;
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+
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+ for (i = 0; i < timeout; i++) {
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+ val = bcma_read32(dev, reg);
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+ if ((val & bitmask) == bitmask)
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+ return 0;
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+ udelay(10);
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+ }
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+
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+ return -ETIMEDOUT;
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+}
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+
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+static void __devinit bcma_hcd_4716wa(struct bcma_device *dev)
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+{
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+#ifdef CONFIG_BCMA_DRIVER_MIPS
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+ /* Work around for 4716 failures. */
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+ if (dev->bus->chipinfo.id == 0x4716) {
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+ u32 tmp;
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+
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+ tmp = bcma_cpu_clock(&dev->bus->drv_mips);
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+ if (tmp >= 480000000)
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+ tmp = 0x1846b; /* set CDR to 0x11(fast) */
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+ else if (tmp == 453000000)
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+ tmp = 0x1046b; /* set CDR to 0x10(slow) */
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+ else
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+ tmp = 0;
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+
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+ /* Change Shim mdio control reg to fix host not acking at
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+ * high frequencies
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+ */
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+ if (tmp) {
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+ bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
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+ udelay(500);
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+
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+ bcma_write32(dev, 0x524, tmp);
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+ udelay(500);
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+ bcma_write32(dev, 0x524, 0x4ab);
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+ udelay(500);
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+ bcma_read32(dev, 0x528);
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+ bcma_write32(dev, 0x528, 0x80000000);
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+ }
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+ }
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+#endif /* CONFIG_BCMA_DRIVER_MIPS */
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+}
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+
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+/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
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+static void __devinit bcma_hcd_init_chip(struct bcma_device *dev)
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+{
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+ u32 tmp;
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+
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+ /*
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+ * USB 2.0 special considerations:
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+ *
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+ * 1. Since the core supports both OHCI and EHCI functions, it must
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+ * only be reset once.
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+ *
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+ * 2. In addition to the standard SI reset sequence, the Host Control
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+ * Register must be programmed to bring the USB core and various
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+ * phy components out of reset.
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+ */
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+ if (!bcma_core_is_enabled(dev)) {
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+ bcma_core_enable(dev, 0);
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+ mdelay(10);
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+ if (dev->id.rev >= 5) {
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+ /* Enable Misc PLL */
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+ tmp = bcma_read32(dev, 0x1e0);
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+ tmp |= 0x100;
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+ bcma_write32(dev, 0x1e0, tmp);
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+ if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
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+ printk(KERN_EMERG "Failed to enable misc PPL!\n");
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+
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+ /* Take out of resets */
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+ bcma_write32(dev, 0x200, 0x4ff);
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+ udelay(25);
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+ bcma_write32(dev, 0x200, 0x6ff);
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+ udelay(25);
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+
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+ /* Make sure digital and AFE are locked in USB PHY */
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+ bcma_write32(dev, 0x524, 0x6b);
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+ udelay(50);
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+ tmp = bcma_read32(dev, 0x524);
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+ udelay(50);
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+ bcma_write32(dev, 0x524, 0xab);
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+ udelay(50);
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+ tmp = bcma_read32(dev, 0x524);
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+ udelay(50);
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+ bcma_write32(dev, 0x524, 0x2b);
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+ udelay(50);
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+ tmp = bcma_read32(dev, 0x524);
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+ udelay(50);
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+ bcma_write32(dev, 0x524, 0x10ab);
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+ udelay(50);
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+ tmp = bcma_read32(dev, 0x524);
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+
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+ if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
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+ tmp = bcma_read32(dev, 0x528);
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+ printk(KERN_EMERG
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+ "USB20H mdio_rddata 0x%08x\n", tmp);
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+ }
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+ bcma_write32(dev, 0x528, 0x80000000);
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+ tmp = bcma_read32(dev, 0x314);
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+ udelay(265);
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+ bcma_write32(dev, 0x200, 0x7ff);
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+ udelay(10);
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+
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+ /* Take USB and HSIC out of non-driving modes */
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+ bcma_write32(dev, 0x510, 0);
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+ } else {
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+ bcma_write32(dev, 0x200, 0x7ff);
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+
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+ udelay(1);
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+ }
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+
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+ bcma_hcd_4716wa(dev);
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+ }
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+}
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+
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+static const struct usb_hci_pdata p_data = {
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+ .flags = USB_HCI_PDATA_PORT_POWER_SET,
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+ .power_set_is_on = 1,
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+};
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+
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+static struct platform_device * __devinit
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+bcma_hcd_create_pdev(struct bcma_device *dev, char *name, u32 addr)
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+{
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+ struct platform_device *hci_dev;
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+ struct resource hci_res[2];
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+ int ret = -ENOMEM;
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+
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+ memset(hci_res, 0, sizeof(hci_res));
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+
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+ hci_res[0].start = addr;
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+ hci_res[0].end = hci_res[0].start + 0x1000 - 1;
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+ hci_res[0].flags = IORESOURCE_MEM;
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+
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+ hci_res[1].start = dev->irq;
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+ hci_res[1].flags = IORESOURCE_IRQ;
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+
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+ hci_dev = platform_device_alloc(name, 0);
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+ if (!hci_dev)
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+ return NULL;
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+
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+ hci_dev->dev.parent = &dev->dev;
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+ hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
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+
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+ ret = platform_device_add_resources(hci_dev, hci_res,
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+ ARRAY_SIZE(hci_res));
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+ if (ret)
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+ goto err_alloc;
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+ ret = platform_device_add_data(hci_dev, &p_data, sizeof(p_data));
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+ if (ret)
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+ goto err_alloc;
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+ ret = platform_device_add(hci_dev);
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+ if (ret)
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+ goto err_alloc;
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+
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+ return hci_dev;
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+
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+err_alloc:
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+ platform_device_put(hci_dev);
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+ return ERR_PTR(ret);
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+}
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+
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+static int __devinit bcma_hcd_probe(struct bcma_device *dev)
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+{
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+ int err;
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+ u16 chipid_top;
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+ u32 ohci_addr;
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+ struct bcma_hcd_device *usb_dev;
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+ struct bcma_chipinfo *chipinfo;
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+
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+ chipinfo = &dev->bus->chipinfo;
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+ /* USBcores are only connected on embedded devices. */
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+ chipid_top = (chipinfo->id & 0xFF00);
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+ if (chipid_top != 0x4700 && chipid_top != 0x5300)
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+ return -ENODEV;
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+
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+ /* TODO: Probably need checks here; is the core connected? */
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+
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+ if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
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+ dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
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+ return -EOPNOTSUPP;
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+
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+ usb_dev = kzalloc(sizeof(struct bcma_hcd_device), GFP_KERNEL);
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+ if (!usb_dev)
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+ return -ENOMEM;
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+
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+ bcma_hcd_init_chip(dev);
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+
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+ /* In AI chips EHCI is addrspace 0, OHCI is 1 */
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+ ohci_addr = dev->addr1;
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+ if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
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+ && chipinfo->rev == 0)
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+ ohci_addr = 0x18009000;
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+
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+ usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
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+ ohci_addr);
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+ if (IS_ERR(usb_dev->ohci_dev)) {
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+ err = PTR_ERR(usb_dev->ohci_dev);
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+ goto err_free_usb_dev;
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+ }
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+
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+ usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
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+ dev->addr);
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+ if (IS_ERR(usb_dev->ehci_dev)) {
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+ err = PTR_ERR(usb_dev->ehci_dev);
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+ goto err_unregister_ohci_dev;
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+ }
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+
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+ bcma_set_drvdata(dev, usb_dev);
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+ return 0;
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+
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+err_unregister_ohci_dev:
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+ platform_device_unregister(usb_dev->ohci_dev);
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+err_free_usb_dev:
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+ kfree(usb_dev);
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+ return err;
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+}
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+
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+static void __devexit bcma_hcd_remove(struct bcma_device *dev)
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+{
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+ struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
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+ struct platform_device *ohci_dev = usb_dev->ohci_dev;
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+ struct platform_device *ehci_dev = usb_dev->ehci_dev;
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+
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+ if (ohci_dev)
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+ platform_device_unregister(ohci_dev);
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+ if (ehci_dev)
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+ platform_device_unregister(ehci_dev);
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+
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+ bcma_core_disable(dev, 0);
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+}
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+
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+static void bcma_hcd_shutdown(struct bcma_device *dev)
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+{
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+ bcma_core_disable(dev, 0);
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+}
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+
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+#ifdef CONFIG_PM
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+
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+static int bcma_hcd_suspend(struct bcma_device *dev, pm_message_t state)
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+{
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+ bcma_core_disable(dev, 0);
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+
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+ return 0;
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+}
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+
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+static int bcma_hcd_resume(struct bcma_device *dev)
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+{
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+ bcma_core_enable(dev, 0);
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+
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+ return 0;
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+}
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+
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+#else /* !CONFIG_PM */
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+#define bcma_hcd_suspend NULL
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+#define bcma_hcd_resume NULL
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+#endif /* CONFIG_PM */
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+
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+static const struct bcma_device_id bcma_hcd_table[] __devinitconst = {
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+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
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+ BCMA_CORETABLE_END
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+};
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+MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
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+
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+static struct bcma_driver bcma_hcd_driver = {
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+ .name = KBUILD_MODNAME,
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+ .id_table = bcma_hcd_table,
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+ .probe = bcma_hcd_probe,
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+ .remove = __devexit_p(bcma_hcd_remove),
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+ .shutdown = bcma_hcd_shutdown,
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+ .suspend = bcma_hcd_suspend,
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+ .resume = bcma_hcd_resume,
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+};
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+
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+static int __init bcma_hcd_init(void)
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+{
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+ return bcma_driver_register(&bcma_hcd_driver);
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+}
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+module_init(bcma_hcd_init);
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+
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+static void __exit bcma_hcd_exit(void)
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+{
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+ bcma_driver_unregister(&bcma_hcd_driver);
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+}
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+module_exit(bcma_hcd_exit);
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