8df4eb0b9b
Based on a submission to the uboot-lantiq repo by Eddi De Pieri. Devices like the xrx200 Arcadyan VGV7519 are using two NOR flash chips. Signed-off-by: Mathias Kresin <dev@kresin.me>
30 lines
1.1 KiB
Diff
30 lines
1.1 KiB
Diff
From 7361581a1baaec43058f5b9350c32c7ac4e58064 Mon Sep 17 00:00:00 2001
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From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Date: Mon, 12 Aug 2013 00:11:16 +0200
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Subject: MIPS: vrx200: add NAND SPL support
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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--- a/arch/mips/cpu/mips32/vrx200/config.mk
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+++ b/arch/mips/cpu/mips32/vrx200/config.mk
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@@ -27,4 +27,9 @@ ALL-y += $(obj)u-boot.ltq.norspl
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ALL-$(CONFIG_SPL_LZO_SUPPORT) += $(obj)u-boot.ltq.lzo.norspl
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ALL-$(CONFIG_SPL_LZMA_SUPPORT) += $(obj)u-boot.ltq.lzma.norspl
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endif
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+ifdef CONFIG_SYS_BOOT_NANDSPL
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+ALL-y += $(obj)u-boot.ltq.nandspl
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+ALL-$(CONFIG_SPL_LZO_SUPPORT) += $(obj)u-boot.ltq.lzo.nandspl
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+ALL-$(CONFIG_SPL_LZMA_SUPPORT) += $(obj)u-boot.ltq.lzma.nandspl
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+endif
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endif
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--- a/arch/mips/include/asm/arch-vrx200/config.h
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+++ b/arch/mips/include/asm/arch-vrx200/config.h
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@@ -167,7 +167,7 @@
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#define CONFIG_SYS_TEXT_BASE 0xB0000000
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#endif
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-#if defined(CONFIG_SYS_BOOT_SFSPL)
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+#if defined(CONFIG_SYS_BOOT_SFSPL) || defined(CONFIG_SYS_BOOT_NANDSPL)
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SPL_TEXT_BASE 0xBE220000
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#endif
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