c9ae111a20
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.12, and Linux v3.13. This work mainly covers: * Finishes work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family, and the Armada family. * timer initialization update, and access function for the Armada family. * Generic IRQ handling backporting. * Some bug fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39566
62 lines
1.5 KiB
Diff
62 lines
1.5 KiB
Diff
From 079d1ecae4bd4166a0f89bcb8e0c96bec1b39622 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Thu, 8 Aug 2013 18:03:09 -0300
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Subject: [PATCH 175/203] ARM: mvebu: Relocate PCIe node in Armada 370 RD board
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The pcie-controller node needs to be relocated according the MBus
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DT binding, since it's now a child of the mbus-compatible node.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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---
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arch/arm/boot/dts/armada-370-rd.dts | 32 ++++++++++++++++----------------
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1 file changed, 16 insertions(+), 16 deletions(-)
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--- a/arch/arm/boot/dts/armada-370-rd.dts
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+++ b/arch/arm/boot/dts/armada-370-rd.dts
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@@ -31,6 +31,22 @@
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
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+ pcie-controller {
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+ status = "okay";
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+
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+ /* Internal mini-PCIe connector */
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+ pcie@1,0 {
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+ /* Port 0, Lane 0 */
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+ status = "okay";
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+ };
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+
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+ /* Internal mini-PCIe connector */
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+ pcie@2,0 {
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+ /* Port 1, Lane 0 */
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+ status = "okay";
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+ };
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+ };
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+
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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@@ -88,22 +104,6 @@
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gpios = <&gpio0 6 1>;
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};
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};
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-
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- pcie-controller {
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- status = "okay";
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-
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- /* Internal mini-PCIe connector */
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- pcie@1,0 {
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- /* Port 0, Lane 0 */
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- status = "okay";
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- };
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-
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- /* Internal mini-PCIe connector */
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- pcie@2,0 {
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- /* Port 1, Lane 0 */
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- status = "okay";
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- };
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- };
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};
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};
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};
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