100 lines
2.2 KiB
C
100 lines
2.2 KiB
C
/*
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* Copyright (c) 2006 Atheros Communications Inc.
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* All rights reserved.
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*
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* $ATH_LICENSE_HOSTSDK0_C$
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*
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*/
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#ifndef __AR6000_REGDUMP_H__
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#define __AR6000_REGDUMP_H__
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#if !defined(__ASSEMBLER__)
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/*
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* Target CPU state at the time of failure is reflected
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* in a register dump, which the Host can fetch through
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* the diagnostic window.
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*/
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struct MIPS_exception_frame_s {
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A_UINT32 pc; /* Program Counter */
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A_UINT32 at; /* MIPS General Purpose registers */
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A_UINT32 v0;
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A_UINT32 v1;
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A_UINT32 a0;
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A_UINT32 a1;
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A_UINT32 a2;
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A_UINT32 a3;
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A_UINT32 t0;
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A_UINT32 t1;
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A_UINT32 t2;
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A_UINT32 t3;
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A_UINT32 t4;
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A_UINT32 t5;
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A_UINT32 t6;
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A_UINT32 t7;
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A_UINT32 s0;
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A_UINT32 s1;
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A_UINT32 s2;
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A_UINT32 s3;
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A_UINT32 s4;
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A_UINT32 s5;
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A_UINT32 s6;
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A_UINT32 s7;
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A_UINT32 t8;
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A_UINT32 t9;
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A_UINT32 k0;
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A_UINT32 k1;
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A_UINT32 gp;
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A_UINT32 sp;
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A_UINT32 s8;
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A_UINT32 ra;
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A_UINT32 cause; /* Selected coprocessor regs */
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A_UINT32 status;
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};
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typedef struct MIPS_exception_frame_s CPU_exception_frame_t;
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#endif
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/*
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* Offsets into MIPS_exception_frame structure, for use in assembler code
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* MUST MATCH C STRUCTURE ABOVE
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*/
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#define RD_pc 0
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#define RD_at 1
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#define RD_v0 2
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#define RD_v1 3
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#define RD_a0 4
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#define RD_a1 5
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#define RD_a2 6
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#define RD_a3 7
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#define RD_t0 8
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#define RD_t1 9
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#define RD_t2 10
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#define RD_t3 11
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#define RD_t4 12
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#define RD_t5 13
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#define RD_t6 14
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#define RD_t7 15
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#define RD_s0 16
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#define RD_s1 17
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#define RD_s2 18
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#define RD_s3 19
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#define RD_s4 20
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#define RD_s5 21
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#define RD_s6 22
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#define RD_s7 23
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#define RD_t8 24
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#define RD_t9 25
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#define RD_k0 26
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#define RD_k1 27
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#define RD_gp 28
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#define RD_sp 29
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#define RD_s8 30
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#define RD_ra 31
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#define RD_cause 32
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#define RD_status 33
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#define RD_SIZE (34*4) /* Space for this number of words */
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#endif /* __AR6000_REGDUMP_H__ */
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