d70ec3008d
Specify firmware partition format by compatible string.
formats in ramips:
- denx,uimage
- tplink,firmware
- seama
It's unlikely but the firmware splitting might not work any longer for
the following boards, due to a custom header:
- EX2700: two uImage headers
- BR-6478AC-V2: edimax-header
- 3G-6200N: edimax-header
- 3G-6200NL: edimax-header
- BR-6475ND: edimax-header
- TEW-638APB-V2: umedia-header
- RT-N56U: mkrtn56uimg
But it rather looks like the uImage splitter is fine with the extra
header.
The following dts are not touched, due to lack of a compatible string in
the matching firmware splitter submodule:
- CONFIG_MTD_SPLIT_JIMAGE_FW
DWR-116-A1.dts
DWR-118-A2.dts
DWR-512-B.dts
DWR-921-C1.dts
LR-25G001.dts
- CONFIG_MTD_SPLIT_TRX_FW
WCR-1166DS.dts
WSR-1166.dts
- CONFIG_MTD_SPLIT_MINOR_FW
RBM11G.dts
RBM33G.dts
- CONFIG_MTD_SPLIT_LZMA_FW
AR670W.dts
- CONFIG_MTD_SPLIT_WRGG_FW
DAP-1522-A1.dts
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
133 lines
2.4 KiB
Text
133 lines
2.4 KiB
Text
/dts-v1/;
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#include "rt3050.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "sitecom,wl-351", "ralink,rt3052-soc";
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model = "Sitecom WL-351 v1 002";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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cfi@1f000000 {
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compatible = "cfi-flash";
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reg = <0x1f000000 0x800000>;
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bank-width = <2>;
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device-width = <2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x3b0000>;
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};
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "wl-351:amber:power";
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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};
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unpopulated {
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label = "wl-351:amber:unpopulated";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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unpopulated2 {
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label = "wl-351:blue:unpopulated";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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rtl8366rb {
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compatible = "realtek,rtl8366rb";
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gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0x4>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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};
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&esw {
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ralink,rgmii = <1>;
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mediatek,portmap = <0x3f>;
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ralink,fct2 = <0x0002500c>;
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/*
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* ext phy base addr 31, rx/tx clock skew 0,
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* turbo mii off, rgmi 3.3v off, port 5 polling off
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* port5: enabled, gige, full-duplex, rx/tx-flow-control
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* port6: enabled, gige, full-duplex, rx/tx-flow-control
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*/
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ralink,fpa2 = <0x1f003fff>;
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&otg {
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status = "okay";
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};
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