15a14cf166
The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LEDE/OPENWRT will auto strip executable program file while make. So we need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network fiemware be destroyed, then run make to build ls1012ardb firmware. The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message. This issue have noticed the IP owner for investigate, hope he can solve it earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4" bootargs. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
115 lines
3.6 KiB
Diff
115 lines
3.6 KiB
Diff
From 93a1095c7da7291ffb12116de9122d431b9f6113 Mon Sep 17 00:00:00 2001
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From: Sumit Garg <sumit.garg@nxp.com>
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Date: Fri, 6 May 2016 11:11:58 -0400
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Subject: [PATCH 25/93] armv8: ls1012ardb: Add qspi SECURE BOOT target
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Add qspi SECURE BOOT target to enable chain of trust. Also enable
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sec_init in boot sequence.
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Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
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Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
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---
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arch/arm/include/asm/arch-fsl-layerscape/config.h | 7 +++++++
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arch/arm/include/asm/fsl_secure_boot.h | 7 ++++++-
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board/freescale/ls1012ardb/ls1012ardb.c | 5 +++++
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configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 10 ++++++++++
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include/configs/ls1012ardb.h | 2 ++
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5 files changed, 30 insertions(+), 1 deletion(-)
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create mode 100644 configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
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index 6ea4e8e..679be6c 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
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@@ -237,6 +237,13 @@
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#define CONFIG_SYS_FSL_ERRATUM_A009798
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+#define CONFIG_SYS_FSL_SFP_VER_3_2
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+#define CONFIG_SYS_FSL_SEC_MON_BE
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+#define CONFIG_SYS_FSL_SEC_BE
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+#define CONFIG_SYS_FSL_SFP_BE
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+#define CONFIG_SYS_FSL_SRK_LE
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+#define CONFIG_KEY_REVOCATION
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+
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#else
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#error SoC not defined
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#endif
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diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
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index c7f8b3e..c973255 100644
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--- a/arch/arm/include/asm/fsl_secure_boot.h
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+++ b/arch/arm/include/asm/fsl_secure_boot.h
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@@ -50,7 +50,7 @@
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#endif
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#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) ||\
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- defined(CONFIG_LS2085A)
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+ defined(CONFIG_LS2085A) || defined(CONFIG_LS1012A)
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/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
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* Similiarly for LS2080 and LS2085
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*/
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@@ -81,6 +81,11 @@
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#define CONFIG_BS_ADDR_FLASH 0x583900000
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#define CONFIG_BS_HDR_ADDR_RAM 0xa3920000
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#define CONFIG_BS_ADDR_RAM 0xa3900000
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+#elif defined(CONFIG_LS1012A)
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+#define CONFIG_BS_HDR_ADDR_FLASH 0x400c0000
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+#define CONFIG_BS_ADDR_FLASH 0x40060000
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+#define CONFIG_BS_HDR_ADDR_RAM 0xa0060000
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+#define CONFIG_BS_ADDR_RAM 0xa0060000
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#else
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#define CONFIG_BS_HDR_ADDR_FLASH 0x600a0000
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#define CONFIG_BS_ADDR_FLASH 0x60060000
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diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
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index f7b9bce..347b8c8 100644
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--- a/board/freescale/ls1012ardb/ls1012ardb.c
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+++ b/board/freescale/ls1012ardb/ls1012ardb.c
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@@ -20,6 +20,7 @@
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#include <environment.h>
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#include <fsl_mmdc.h>
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#include <netdev.h>
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+#include <fsl_sec.h>
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DECLARE_GLOBAL_DATA_PTR;
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@@ -191,6 +192,10 @@ int board_init(void)
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enable_layerscape_ns_access();
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#endif
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+#ifdef CONFIG_FSL_CAAM
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+ sec_init();
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+#endif
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+
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return 0;
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}
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diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
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new file mode 100644
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index 0000000..92a95a8
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--- /dev/null
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+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
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@@ -0,0 +1,10 @@
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+CONFIG_ARM=y
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+CONFIG_TARGET_LS1012ARDB=y
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+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,SECURE_BOOT"
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+# CONFIG_CMD_IMLS is not set
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+CONFIG_SYS_NS16550=y
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+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
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+CONFIG_OF_CONTROL=y
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+CONFIG_DM=y
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+CONFIG_SPI_FLASH=y
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+CONFIG_DM_SPI=y
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diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
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index af3d33f..b40e02b 100644
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--- a/include/configs/ls1012ardb.h
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+++ b/include/configs/ls1012ardb.h
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@@ -73,4 +73,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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+#define CONFIG_FSL_CAAM /* Enable CAAM */
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+
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#endif /* __LS1012ARDB_H__ */
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--
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1.7.9.5
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