ff08b09570
All (still relevant) patches were refresh. The following patches were dropped because they are applied upstream: - 0003-MIPS-lantiq-handle-vmmc-memory-reservation.patch - 0005-MIPS-lantiq-add-reset-controller-api-support.patch - 0006-MIPS-lantiq-reboot-gphy-on-restart.patch - 0009-MIPS-lantiq-command-line-work-around.patch - 0010-MIPS-lantiq-export-soc-type.patch - 0011-lantiq-add-support-for-xrx200-firmware-depending-on-.patch - 0037-MIPS-lantiq-move-eiu-init-after-irq_domain-register.patch Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46216
41 lines
1.3 KiB
Diff
41 lines
1.3 KiB
Diff
From 76e153079f02d26e3357302d2886a0c8aaaec64d Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sun, 28 Jul 2013 18:02:06 +0200
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Subject: [PATCH 15/36] MTD: lantiq: xway: remove endless loop
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The reset loop logic could run into a endless loop. Lets fix it as requested.
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--> http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/mtd/nand/xway_nand.c | 10 ++++++++--
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1 file changed, 8 insertions(+), 2 deletions(-)
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--- a/drivers/mtd/nand/xway_nand.c
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+++ b/drivers/mtd/nand/xway_nand.c
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@@ -59,16 +59,22 @@ static u32 xway_latchcmd;
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static void xway_reset_chip(struct nand_chip *chip)
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{
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unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
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+ unsigned long timeout;
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unsigned long flags;
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nandaddr &= ~NAND_WRITE_ADDR;
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nandaddr |= NAND_WRITE_CMD;
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/* finish with a reset */
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+ timeout = jiffies + msecs_to_jiffies(20);
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+
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spin_lock_irqsave(&ebu_lock, flags);
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writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr);
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- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
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- ;
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+ do {
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+ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
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+ break;
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+ cond_resched();
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+ } while (!time_after_eq(jiffies, timeout));
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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