12 lines
406 B
Diff
12 lines
406 B
Diff
--- gcc-3.4.2/gcc/config/mips/mips.md 2004-06-25 02:35:30.000000000 -0500
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+++ gcc-3.4-cvs/gcc/config/mips/mips.md 2004-10-26 01:54:56.000000000 -0500
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@@ -4073,8 +4073,7 @@
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"!TARGET_MIPS16"
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"lwl\t%0,%2"
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[(set_attr "type" "load")
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- (set_attr "mode" "SI")
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- (set_attr "hazard" "none")])
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+ (set_attr "mode" "SI")])
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(define_insn "mov_lwr"
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[(set (match_operand:SI 0 "register_operand" "=d")
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