openwrtv3/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h
David Bauer b6a4c67468 ar71xx: add support for Fritz!Box 4020
This commit adds support for the AVM Fritz!Box 4020 WiFi-router.

SoC:   Qualcomm Atheros QCA9561 (Dragonfly) 750MHz
RAM:   Winbond W971GG6KB-25
FLASH: Macronix MX25L12835F
WiFi:  QCA9561 b/g/n 3x3 450Mbit/s
USB:   1x USB 2.0
IN:    WPS button, WiFi button
OUT:   Power LED green, Internet LED green, WLAN LED green,
       LAN LED green, INFO LED green, INFO LED red
UART:  Header Next to Black metal shield
       Pinout is 3.3V - RX - TX - GND (Square Pad is 3.3V)
       The Serial setting is 115200-8-N-1.

Tested and working:
 - Ethernet (LAN + WAN)
 - WiFi (correct MAC)
 - Installation via EVA bootloader
 - OpenWRT sysupgrade
 - Buttons
 - LEDs

Not working:
 - USB port

Installation via EVA:
In the first seconds after Power is connected, the bootloader will
listen for FTP connections on 169.254.157.1 (Might also be 192.168.178.1). Firmware can be uploaded
like following:

  ftp> quote USER adam2
  ftp> quote PASS adam2
  ftp> binary
  ftp> debug
  ftp> passive
  ftp> quote MEDIA FLSH
  ftp> put openwrt-sysupgrade.bin mtd1

Note that this procedure might take up to two minutes. After transfer is
complete you need to powercycle the device to boot OpenWRT.

Signed-off-by: David Bauer <mail@david-bauer.net>
2018-05-07 10:42:26 +02:00

55 lines
1.8 KiB
C

/*
* Atheros AR71xx SoC device definitions
*
* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_ETH_H
#define _ATH79_DEV_ETH_H
#include <asm/mach-ath79/ag71xx_platform.h>
struct platform_device;
extern unsigned char ath79_mac_base[] __initdata;
void ath79_parse_ascii_mac(char *mac_str, u8 *mac);
void ath79_extract_mac_reverse(u8 *ptr, u8 *out);
void ath79_init_mac(unsigned char *dst, const unsigned char *src,
int offset);
void ath79_init_local_mac(unsigned char *dst, const unsigned char *src);
struct ath79_eth_pll_data {
u32 pll_10;
u32 pll_100;
u32 pll_1000;
};
extern struct ath79_eth_pll_data ath79_eth0_pll_data;
extern struct ath79_eth_pll_data ath79_eth1_pll_data;
extern struct ag71xx_platform_data ath79_eth0_data;
extern struct ag71xx_platform_data ath79_eth1_data;
extern struct platform_device ath79_eth0_device;
extern struct platform_device ath79_eth1_device;
void ath79_register_eth(unsigned int id);
extern struct ag71xx_switch_platform_data ath79_switch_data;
extern struct ag71xx_mdio_platform_data ath79_mdio0_data;
extern struct ag71xx_mdio_platform_data ath79_mdio1_data;
extern struct platform_device ath79_mdio0_device;
extern struct platform_device ath79_mdio1_device;
void ath79_register_mdio(unsigned int id, u32 phy_mask);
void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio);
void ath79_setup_ar934x_eth_cfg(u32 mask);
void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv);
void ath79_setup_qca955x_eth_cfg(u32 mask);
void ath79_setup_qca956x_eth_cfg(u32 mask);
#endif /* _ATH79_DEV_ETH_H */