openwrtv3/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi
Hauke Mehrtens 6eaf8b3d89 lantiq: kernel 4.14: update dts files
Updated the devicetree source files to make use of the following
upstreamed drivers:

 - xrx200 ethernet phy
 - reset controller unit
 - dwc2
 - fpi

Use our custom xrx200 ethernet phy compatible to support boards, which
have switched the vr9 revision during lifetime, with a single devicetree
source file.

By switching to the dwc2 driver + usb phy framework, we don't need to used
our custom gpio power patch and can use a fixed regulator instead.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-02-20 19:25:17 +01:00

297 lines
5.7 KiB
Text

#include "vr9.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/mips/lantiq_rcu_gphy.h>
/ {
compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
chosen {
bootargs = "console=ttyLTQ0,115200";
};
aliases {
led-boot = &power_green;
led-failsafe = &power_red;
led-running = &power_green;
led-dsl = &dsl_green;
led-internet = &internet_green;
led-wifi = &wireless_green;
};
memory@0 {
reg = <0x0 0x8000000>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
gpio-leds {
compatible = "gpio-leds";
internet_red {
label = "p2812hnufx:red:internet";
gpios = <&stp 16 GPIO_ACTIVE_LOW>;
};
internet_green: internet_green {
label = "p2812hnufx:green:internet";
gpios = <&stp 17 GPIO_ACTIVE_LOW>;
};
dsl_green: dsl_green {
label = "p2812hnufx:green:dsl";
gpios = <&stp 18 GPIO_ACTIVE_LOW>;
};
dsl_orange {
label = "p2812hnufx:orange:dsl";
gpios = <&stp 19 GPIO_ACTIVE_LOW>;
};
wireless_orange {
label = "p2812hnufx:orange:wlan";
gpios = <&stp 20 GPIO_ACTIVE_LOW>;
};
wireless_green: wireless_green {
label = "p2812hnufx:green:wlan";
gpios = <&stp 21 GPIO_ACTIVE_LOW>;
};
power_red: power {
label = "p2812hnufx:red:power";
gpios = <&stp 22 GPIO_ACTIVE_LOW>;
};
power_green: power2 {
label = "p2812hnufx:green:power";
gpios = <&stp 23 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
phone1 {
label = "p2812hnufx:green:phone";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
phone1warn {
label = "p2812hnufx:orange:phone";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
phone2warn {
label = "p2812hnufx:orange:phone2";
gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
};
phone2 {
label = "p2812hnufx:green:phone2";
gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
};
};
usb_vbus: regulator-usb-vbus {
compatible = "regulator-fixed";
regulator-name = "USB_VBUS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&eth0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mac-address = [ 00 11 22 33 44 55 ];
lantiq,switch;
ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
};
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <1>;
phy-mode = "rgmii";
phy-handle = <&phy1>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "gmii";
phy-handle = <&phy11>;
};
ethernet@4 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
reg = <0>;
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy1: ethernet-phy@1 {
reg = <0x1>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy5: ethernet-phy@5 {
reg = <0x5>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
&gphy1 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
exin3 {
lantiq,groups = "exin3";
lantiq,function = "exin";
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1",
"gphy0 led2", "gphy1 led2";
lantiq,function = "gphy";
lantiq,pull = <2>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
stp {
lantiq,groups = "stp";
lantiq,function = "stp";
lantiq,pull = <2>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
pci-in {
lantiq,groups = "req1";
lantiq,function = "pci";
lantiq,output = <0>;
lantiq,open-drain = <1>;
lantiq,pull = <2>;
};
pci-out {
lantiq,groups = "gnt1";
lantiq,function = "pci";
lantiq,output = <1>;
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
pci_rst {
lantiq,pins = "io21";
lantiq,output = <1>;
lantiq,open-drain = <0>;
lantiq,pull = <2>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
ifxhcd-rst {
lantiq,pins = "io33";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
nand_out {
lantiq,groups = "nand cle", "nand ale";
lantiq,function = "ebu";
lantiq,output = <1>;
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
nand_cs1 {
lantiq,groups = "nand cs1";
lantiq,function = "ebu";
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
};
};
&pci0 {
status = "okay";
gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
&stp {
status = "okay";
lantiq,shadow = <0xffffff>;
lantiq,groups = <0x7>;
lantiq,dsl = <0x0>;
lantiq,phy1 = <0x0>;
lantiq,phy2 = <0x0>;
};
&usb_phy0 {
status = "okay";
phy-supply = <&usb_vbus>;
};
&usb_phy1 {
status = "okay";
phy-supply = <&usb_vbus>;
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};