82ae68be70
On danube the USB0 registers are at 1e101000 similar to all other lantiq SoCs. On Danube and AR9 the USB core is connected to the AHB bus, hence we need to enable the AHB Bus as well. Signed-off-by: Mathias Kresin <dev@kresin.me>
37 lines
1.8 KiB
Diff
37 lines
1.8 KiB
Diff
From 2f57c45efb9acb5eea2d8af211ab87b3ccfbf584 Mon Sep 17 00:00:00 2001
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From: Mathias Kresin <dev@kresin.me>
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Date: Sat, 20 Jan 2018 14:38:40 +0100
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Subject: [PATCH] MIPS: lantiq: enable AHB Bus for USB
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On Danube and AR9 the USB core is connected to the AHB bus, hence we need
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to enable the AHB Bus as well.
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Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module")
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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---
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arch/mips/lantiq/xway/sysctrl.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/arch/mips/lantiq/xway/sysctrl.c
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+++ b/arch/mips/lantiq/xway/sysctrl.c
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@@ -570,9 +570,9 @@ void __init ltq_soc_init(void)
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clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
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ltq_ar9_fpi_hz(), CLOCK_250M);
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clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
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- clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
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+ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
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clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);
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- clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
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+ clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM);
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clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH);
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clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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@@ -581,7 +581,7 @@ void __init ltq_soc_init(void)
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} else {
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clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
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ltq_danube_fpi_hz(), ltq_danube_pp32_hz());
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- clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
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+ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
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clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
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clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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