John Crispin be68f34708 ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg ... Some u-boot versions for QCA955x set currently not cleared bits depending on the used link speed. This breaks the rx/tx under OpenWrt. The mach-*.c file is responsible to select the correct configuration bits and thus the ath79_setup_qca955x_eth_cfg has to clear the unset. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> SVN-Revision: 49028		2016-03-16 09:27:04 +00:00
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ath79	ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg	2016-03-16 09:27:04 +00:00
include/asm	ar71xx: ag71xx: get max_frame_len and desc_pktlen_mask from platform data	2013-12-20 11:41:17 +00:00