5046 lines
102 KiB
Diff
5046 lines
102 KiB
Diff
--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -573,92 +573,61 @@
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omap4-var-stk-om44.dtb
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dtb-$(CONFIG_SOC_AM43XX) += \
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am43x-epos-evm.dtb \
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- am437x-cm-t43.dtb \
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- am437x-gp-evm.dtb \
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+ am437x-sk-evm.dtb \
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am437x-idk-evm.dtb \
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- am437x-sbc-t43.dtb \
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- am437x-sk-evm.dtb
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+ am437x-gp-evm.dtb
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dtb-$(CONFIG_SOC_OMAP5) += \
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omap5-cm-t54.dtb \
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omap5-igep0050.dtb \
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omap5-sbc-t54.dtb \
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omap5-uevm.dtb
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dtb-$(CONFIG_SOC_DRA7XX) += \
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- am57xx-beagle-x15.dtb \
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- am57xx-beagle-x15-revb1.dtb \
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- am57xx-cl-som-am57x.dtb \
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- am57xx-sbc-am57x.dtb \
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- am572x-idk.dtb \
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dra7-evm.dtb \
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- dra72-evm.dtb \
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- dra72-evm-revc.dtb
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+ am57xx-beagle-x15.dtb \
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+ dra72-evm.dtb
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dtb-$(CONFIG_ARCH_ORION5X) += \
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- orion5x-kuroboxpro.dtb \
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orion5x-lacie-d2-network.dtb \
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orion5x-lacie-ethernet-disk-mini-v2.dtb \
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- orion5x-linkstation-lsgl.dtb \
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orion5x-linkstation-lswtgl.dtb \
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orion5x-lswsgl.dtb \
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orion5x-maxtor-shared-storage-2.dtb \
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- orion5x-netgear-wnr854t.dtb \
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orion5x-rd88f5182-nas.dtb
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dtb-$(CONFIG_ARCH_PRIMA2) += \
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prima2-evb.dtb
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-dtb-$(CONFIG_ARCH_OXNAS) += \
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- wd-mbwe.dtb
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dtb-$(CONFIG_ARCH_QCOM) += \
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- qcom-apq8060-dragonboard.dtb \
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- qcom-apq8064-arrow-sd-600eval.dtb \
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qcom-apq8064-cm-qs600.dtb \
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qcom-apq8064-ifc6410.dtb \
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- qcom-apq8064-sony-xperia-yuga.dtb \
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- qcom-apq8064-asus-nexus7-flo.dtb \
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qcom-apq8074-dragonboard.dtb \
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qcom-apq8084-ifc6540.dtb \
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qcom-apq8084-mtp.dtb \
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- qcom-ipq4019-ap.dk01.1-c1.dtb \
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- qcom-ipq4019-ap.dk04.1-c1.dtb \
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qcom-ipq8064-ap148.dtb \
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+ qcom-ipq8064-c2600.dtb \
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+ qcom-ipq8064-d7800.dtb \
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+ qcom-ipq8064-db149.dtb \
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+ qcom-ipq8064-ea8500.dtb \
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+ qcom-ipq8064-r7500.dtb \
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+ qcom-ipq8064-r7500v2.dtb \
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+ qcom-ipq8065-nbg6817.dtb \
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+ qcom-ipq8065-r7800.dtb \
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qcom-msm8660-surf.dtb \
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qcom-msm8960-cdp.dtb \
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- qcom-msm8974-lge-nexus5-hammerhead.dtb \
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qcom-msm8974-sony-xperia-honami.dtb
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dtb-$(CONFIG_ARCH_REALVIEW) += \
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- arm-realview-pb1176.dtb \
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- arm-realview-pb11mp.dtb \
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- arm-realview-eb.dtb \
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- arm-realview-eb-bbrevd.dtb \
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- arm-realview-eb-11mp.dtb \
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- arm-realview-eb-11mp-bbrevd.dtb \
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- arm-realview-eb-11mp-ctrevb.dtb \
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- arm-realview-eb-11mp-bbrevd-ctrevb.dtb \
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- arm-realview-eb-a9mp.dtb \
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- arm-realview-eb-a9mp-bbrevd.dtb \
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- arm-realview-pba8.dtb \
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- arm-realview-pbx-a9.dtb
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+ arm-realview-pb1176.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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- rk3036-evb.dtb \
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- rk3036-kylin.dtb \
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rk3066a-bqcurie2.dtb \
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rk3066a-marsboard.dtb \
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rk3066a-rayeager.dtb \
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rk3188-radxarock.dtb \
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- rk3228-evb.dtb \
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- rk3229-evb.dtb \
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rk3288-evb-act8846.dtb \
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rk3288-evb-rk808.dtb \
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- rk3288-fennec.dtb \
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rk3288-firefly-beta.dtb \
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rk3288-firefly.dtb \
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- rk3288-firefly-reload.dtb \
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- rk3288-miqi.dtb \
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rk3288-popmetal.dtb \
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rk3288-r89.dtb \
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rk3288-rock2-square.dtb \
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- rk3288-veyron-brain.dtb \
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rk3288-veyron-jaq.dtb \
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rk3288-veyron-jerry.dtb \
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- rk3288-veyron-mickey.dtb \
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rk3288-veyron-minnie.dtb \
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rk3288-veyron-pinky.dtb \
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rk3288-veyron-speedy.dtb
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -4,12 +4,9 @@
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model = "Qualcomm IPQ8064/AP148";
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compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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- aliases {
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- serial0 = &gsbi4_serial;
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- };
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-
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- chosen {
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- stdout-path = "serial0:115200n8";
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+ memory@0 {
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+ reg = <0x42000000 0x1e000000>;
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+ device_type = "memory";
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};
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reserved-memory {
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@@ -22,6 +19,15 @@
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};
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};
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+ aliases {
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+ serial0 = &uart4;
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+ mdio-gpio0 = &mdio0;
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+ };
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+
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+ chosen {
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+ linux,stdout-path = "serial0:115200n8";
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+ };
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+
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soc {
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pinmux@800000 {
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i2c4_pins: i2c4_pinmux {
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@@ -60,6 +66,25 @@
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bias-bus-hold;
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};
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};
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+
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+ mdio0_pins: mdio0_pins {
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+ mux {
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+ pins = "gpio0", "gpio1";
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+ function = "gpio";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+ };
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+
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+ rgmii2_pins: rgmii2_pins {
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+ mux {
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+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
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+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
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+ function = "rgmii2";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+ };
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};
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gsbi@16300000 {
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@@ -69,14 +94,12 @@
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status = "ok";
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};
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- i2c4: i2c@16380000 {
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- status = "ok";
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-
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- clock-frequency = <200000>;
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-
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- pinctrl-0 = <&i2c4_pins>;
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- pinctrl-names = "default";
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- };
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+ /*
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+ * The i2c device on gsbi4 should not be enabled.
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+ * On ipq806x designs gsbi4 i2c is meant for exclusive
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+ * RPM usage. Turning this on in kernel manifests as
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+ * i2c failure for the RPM.
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+ */
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};
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gsbi5: gsbi@1a200000 {
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@@ -99,15 +122,7 @@
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spi-max-frequency = <50000000>;
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reg = <0>;
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- partition@0 {
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- label = "rootfs";
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- reg = <0x0 0x1000000>;
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- };
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-
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- partition@1 {
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- label = "scratch";
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- reg = <0x1000000 0x1000000>;
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- };
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+ linux,part-probe = "qcom-smem";
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};
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};
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};
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@@ -117,23 +132,105 @@
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};
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sata@29000000 {
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- ports-implemented = <0x1>;
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status = "ok";
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};
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+ phy@100f8800 { /* USB3 port 1 HS phy */
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+ status = "ok";
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+ };
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+
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+ phy@100f8830 { /* USB3 port 1 SS phy */
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+ status = "ok";
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+ };
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+
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+ phy@110f8800 { /* USB3 port 0 HS phy */
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+ status = "ok";
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+ };
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+
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+ phy@110f8830 { /* USB3 port 0 SS phy */
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+ status = "ok";
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+ };
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+
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+ usb30@0 {
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+ status = "ok";
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+ };
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+
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+ usb30@1 {
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+ status = "ok";
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+ };
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+
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+ pcie0: pci@1b500000 {
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+ status = "ok";
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+ phy-tx0-term-offset = <7>;
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+ };
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+
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+ pcie1: pci@1b700000 {
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+ status = "ok";
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+ phy-tx0-term-offset = <7>;
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+ };
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+
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nand@1ac00000 {
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status = "ok";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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- nandcs@0 {
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- compatible = "qcom,nandcs";
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+ nand-ecc-strength = <4>;
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+ nand-bus-width = <8>;
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+
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+ linux,part-probe = "qcom-smem";
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+ };
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+
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+ mdio0: mdio {
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+ compatible = "virtual,mdio-gpio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
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+ pinctrl-0 = <&mdio0_pins>;
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+ pinctrl-names = "default";
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+
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+ phy0: ethernet-phy@0 {
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+ device_type = "ethernet-phy";
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reg = <0>;
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+ qca,ar8327-initvals = <
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+ 0x00004 0x7600000 /* PAD0_MODE */
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+ 0x00008 0x1000000 /* PAD5_MODE */
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+ 0x0000c 0x80 /* PAD6_MODE */
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+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
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+ 0x000e0 0xc74164de /* SGMII_CTRL */
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+ 0x0007c 0x4e /* PORT0_STATUS */
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+ 0x00094 0x4e /* PORT6_STATUS */
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+ >;
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+ };
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+
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+ phy4: ethernet-phy@4 {
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+ device_type = "ethernet-phy";
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+ reg = <4>;
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+ };
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+ };
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+
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+ gmac1: ethernet@37200000 {
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+ status = "ok";
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+ phy-mode = "rgmii";
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+ qcom,id = <1>;
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+
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+ pinctrl-0 = <&rgmii2_pins>;
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+ pinctrl-names = "default";
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+
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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+ };
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+ };
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+
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+ gmac2: ethernet@37400000 {
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+ status = "ok";
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+ phy-mode = "sgmii";
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+ qcom,id = <2>;
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- nand-ecc-strength = <4>;
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- nand-ecc-step-size = <512>;
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- nand-bus-width = <8>;
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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};
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};
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};
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--- /dev/null
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+++ b/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
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@@ -0,0 +1,501 @@
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+#include "qcom-ipq8064-v1.0.dtsi"
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+
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+#include <dt-bindings/input/input.h>
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+
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+/ {
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+ model = "TP-Link Archer C2600";
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+ compatible = "tplink,c2600", "qcom,ipq8064";
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+
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+ memory@0 {
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+ reg = <0x42000000 0x1e000000>;
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+ device_type = "memory";
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+ };
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+
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+ reserved-memory {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+ rsvd@41200000 {
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+ reg = <0x41200000 0x300000>;
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+ no-map;
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+ };
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+ };
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+
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+ aliases {
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+ serial0 = &uart4;
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+ mdio-gpio0 = &mdio0;
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+
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+ led-boot = &power;
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+ led-failsafe = &general;
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+ led-running = &power;
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+ led-upgrade = &general;
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+ };
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+
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+ chosen {
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+ linux,stdout-path = "serial0:115200n8";
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+ };
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+
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+ soc {
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+ pinmux@800000 {
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+ button_pins: button_pins {
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+ mux {
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+ pins = "gpio16", "gpio54", "gpio65";
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+ function = "gpio";
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+ drive-strength = <2>;
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+ bias-pull-up;
|
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+ };
|
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+ };
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+
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+ i2c4_pins: i2c4_pinmux {
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+ mux {
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+ pins = "gpio12", "gpio13";
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+ function = "gsbi4";
|
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+ drive-strength = <12>;
|
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+ bias-disable;
|
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+ };
|
|
+ };
|
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+
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+ led_pins: led_pins {
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+ mux {
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+ pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
|
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+ "gpio53", "gpio66";
|
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+ function = "gpio";
|
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+ drive-strength = <2>;
|
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+ bias-pull-up;
|
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+ };
|
|
+ };
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+
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+ spi_pins: spi_pins {
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+ mux {
|
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+ pins = "gpio18", "gpio19", "gpio21";
|
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+ function = "gsbi5";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ data {
|
|
+ pins = "gpio18", "gpio19";
|
|
+ drive-strength = <10>;
|
|
+ };
|
|
+
|
|
+ cs {
|
|
+ pins = "gpio20";
|
|
+ function = "gpio";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio21";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb0_pwr_en_pin: usb0_pwr_en_pin {
|
|
+ mux {
|
|
+ pins = "gpio25";
|
|
+ function = "gpio";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-up;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb1_pwr_en_pin: usb1_pwr_en_pin {
|
|
+ mux {
|
|
+ pins = "gpio23";
|
|
+ function = "gpio";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-up;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ gsbi5: gsbi@1a200000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+
|
|
+ spi5: spi@1a280000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&spi_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ flash: m25p80@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ spi-max-frequency = <50000000>;
|
|
+ reg = <0>;
|
|
+
|
|
+ SBL1@0 {
|
|
+ label = "SBL1";
|
|
+ reg = <0x0 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ MIBIB@20000 {
|
|
+ label = "MIBIB";
|
|
+ reg = <0x20000 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL2@40000 {
|
|
+ label = "SBL2";
|
|
+ reg = <0x40000 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL3@60000 {
|
|
+ label = "SBL3";
|
|
+ reg = <0x60000 0x30000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ DDRCONFIG@90000 {
|
|
+ label = "DDRCONFIG";
|
|
+ reg = <0x90000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SSD@a0000 {
|
|
+ label = "SSD";
|
|
+ reg = <0xa0000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ TZ@b0000 {
|
|
+ label = "TZ";
|
|
+ reg = <0xb0000 0x30000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ RPM@e0000 {
|
|
+ label = "RPM";
|
|
+ reg = <0xe0000 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ fs-uboot@100000 {
|
|
+ label = "fs-uboot";
|
|
+ reg = <0x100000 0x70000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ uboot-env@170000 {
|
|
+ label = "uboot-env";
|
|
+ reg = <0x170000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ radio@1b0000 {
|
|
+ label = "radio";
|
|
+ reg = <0x1b0000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ os-image@1f0000 {
|
|
+ label = "os-image";
|
|
+ reg = <0x1f0000 0x200000>;
|
|
+ };
|
|
+
|
|
+ rootfs@3f0000 {
|
|
+ label = "rootfs";
|
|
+ reg = <0x3f0000 0x1b00000>;
|
|
+ };
|
|
+
|
|
+ defaultmac: default-mac@1ef0000 {
|
|
+ label = "default-mac";
|
|
+ reg = <0x1ef0000 0x00200>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ pin@1ef0200 {
|
|
+ label = "pin";
|
|
+ reg = <0x1ef0200 0x00200>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ product-info@1ef0400 {
|
|
+ label = "product-info";
|
|
+ reg = <0x1ef0400 0x0fc00>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ partition-table@1f00000 {
|
|
+ label = "partition-table";
|
|
+ reg = <0x1f00000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ soft-version@1f10000 {
|
|
+ label = "soft-version";
|
|
+ reg = <0x1f10000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ support-list@1f20000 {
|
|
+ label = "support-list";
|
|
+ reg = <0x1f20000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ profile@1f30000 {
|
|
+ label = "profile";
|
|
+ reg = <0x1f30000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ default-config@1f40000 {
|
|
+ label = "default-config";
|
|
+ reg = <0x1f40000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ user-config@1f50000 {
|
|
+ label = "user-config";
|
|
+ reg = <0x1f50000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ qos-db@1f90000 {
|
|
+ label = "qos-db";
|
|
+ reg = <0x1f90000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ usb-config@1fd0000 {
|
|
+ label = "usb-config";
|
|
+ reg = <0x1fd0000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ log@1fe0000 {
|
|
+ label = "log";
|
|
+ reg = <0x1fe0000 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb0_pwr_en_pin>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb1_pwr_en_pin>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&defaultmac 0x8>;
|
|
+ mtd-mac-address-increment = <1>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&defaultmac 0x8>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+
|
|
+ ledswitch {
|
|
+ label = "ledswitch";
|
|
+ gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_LIGHTS_TOGGLE>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ lan {
|
|
+ label = "c2600:white:lan";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb4 {
|
|
+ label = "c2600:white:usb_4";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb2 {
|
|
+ label = "c2600:white:usb_2";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "c2600:white:wps";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_amber {
|
|
+ label = "c2600:amber:wan";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ wan_white {
|
|
+ label = "c2600:white:wan";
|
|
+ gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ label = "c2600:white:power";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ general: general {
|
|
+ label = "c2600:white:general";
|
|
+ gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
|
|
@@ -0,0 +1,406 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Netgear Nighthawk X4 D7800";
|
|
+ compatible = "netgear,d7800", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0xe000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power_white;
|
|
+ led-failsafe = &power_amber;
|
|
+ led-running = &power_white;
|
|
+ led-upgrade = &power_amber;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "rootfstype=squashfs noinitrd";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio54", "gpio65";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
|
|
+ "gpio24","gpio26", "gpio53", "gpio64";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb0_pwr_en_pins: usb0_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio15";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb1_pwr_en_pins: usb1_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio16", "gpio68";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb0_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb1_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&pcie0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&pcie1_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ qcadata@0 {
|
|
+ label = "qcadata";
|
|
+ reg = <0x0000000 0x0c80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@c80000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0c80000 0x0500000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@1180000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x1180000 0x0080000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@1200000 {
|
|
+ label = "art";
|
|
+ reg = <0x1200000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ artbak: art@1340000 {
|
|
+ label = "artbak";
|
|
+ reg = <0x1340000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@1480000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x1480000 0x0200000>;
|
|
+ };
|
|
+
|
|
+ ubi@1680000 {
|
|
+ label = "ubi";
|
|
+ reg = <0x1680000 0x1E00000>;
|
|
+ };
|
|
+
|
|
+ netgear@3480000 {
|
|
+ label = "netgear";
|
|
+ reg = <0x3480000 0x4480000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ reserve@7900000 {
|
|
+ label = "reserve";
|
|
+ reg = <0x7900000 0x0700000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ firmware@1480000 {
|
|
+ label = "firmware";
|
|
+ reg = <0x1480000 0x2000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ phy-handle = <&phy4>;
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&art 6>;
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&art 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ usb1 {
|
|
+ label = "d7800:white:usb1";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb2 {
|
|
+ label = "d7800:white:usb2";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power_amber: power_amber {
|
|
+ label = "d7800:amber:power";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_white {
|
|
+ label = "d7800:white:wan";
|
|
+ gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_amber {
|
|
+ label = "d7800:amber:wan";
|
|
+ gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "d7800:white:wps";
|
|
+ gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ esata {
|
|
+ label = "d7800:white:esata";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power_white: power_white {
|
|
+ label = "d7800:white:power";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ label = "d7800:white:wifi";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
|
|
@@ -0,0 +1,236 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Qualcomm IPQ8064/DB149";
|
|
+ compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ alias {
|
|
+ serial0 = &uart2;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ spi_pins: spi_pins {
|
|
+ mux {
|
|
+ pins = "gpio18", "gpio19", "gpio21";
|
|
+ function = "gsbi5";
|
|
+ drive-strength = <10>;
|
|
+ bias-none;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii0_pins: rgmii0_pins {
|
|
+ mux {
|
|
+ pins = "gpio2", "gpio66";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi2: gsbi@12480000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ uart2: serial@12490000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi5: gsbi@1a200000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+
|
|
+ spi4: spi@1a280000 {
|
|
+ status = "ok";
|
|
+ spi-max-frequency = <50000000>;
|
|
+
|
|
+ pinctrl-0 = <&spi_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 20 0>;
|
|
+
|
|
+ flash: m25p80@0 {
|
|
+ compatible = "s25fl256s1";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ spi-max-frequency = <50000000>;
|
|
+ reg = <0>;
|
|
+ m25p,fast-read;
|
|
+
|
|
+ partition@0 {
|
|
+ label = "lowlevel_init";
|
|
+ reg = <0x0 0x1b0000>;
|
|
+ };
|
|
+
|
|
+ partition@1 {
|
|
+ label = "u-boot";
|
|
+ reg = <0x1b0000 0x80000>;
|
|
+ };
|
|
+
|
|
+ partition@2 {
|
|
+ label = "u-boot-env";
|
|
+ reg = <0x230000 0x40000>;
|
|
+ };
|
|
+
|
|
+ partition@3 {
|
|
+ label = "caldata";
|
|
+ reg = <0x270000 0x40000>;
|
|
+ };
|
|
+
|
|
+ partition@4 {
|
|
+ label = "firmware";
|
|
+ reg = <0x2b0000 0x1d50000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie2: pci@1b900000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
|
|
+
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+
|
|
+ phy6: ethernet-phy@6 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <6>;
|
|
+ };
|
|
+
|
|
+ phy7: ethernet-phy@7 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <7>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac0: ethernet@37000000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <0>;
|
|
+ phy-handle = <&phy4>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+ phy-handle = <&phy6>;
|
|
+ };
|
|
+
|
|
+ gmac3: ethernet@37600000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <3>;
|
|
+ phy-handle = <&phy7>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
|
|
@@ -1,11 +1,13 @@
|
|
/dts-v1/;
|
|
|
|
#include "skeleton.dtsi"
|
|
-#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
|
|
#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
|
|
+#include <dt-bindings/mfd/qcom-rpm.h>
|
|
#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
|
|
#include <dt-bindings/soc/qcom,gsbi.h>
|
|
+#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Qualcomm IPQ8064";
|
|
@@ -16,7 +18,7 @@
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
- cpu@0 {
|
|
+ cpu0: cpu@0 {
|
|
compatible = "qcom,krait";
|
|
enable-method = "qcom,kpss-acc-v1";
|
|
device_type = "cpu";
|
|
@@ -24,9 +26,18 @@
|
|
next-level-cache = <&L2>;
|
|
qcom,acc = <&acc0>;
|
|
qcom,saw = <&saw0>;
|
|
+ clocks = <&kraitcc 0>, <&kraitcc 4>;
|
|
+ clock-names = "cpu", "l2";
|
|
+ clock-latency = <100000>;
|
|
+ cpu-supply = <&smb208_s2a>;
|
|
+ voltage-tolerance = <5>;
|
|
+ cooling-min-state = <0>;
|
|
+ cooling-max-state = <10>;
|
|
+ #cooling-cells = <2>;
|
|
+ cpu-idle-states = <&CPU_SPC>;
|
|
};
|
|
|
|
- cpu@1 {
|
|
+ cpu1: cpu@1 {
|
|
compatible = "qcom,krait";
|
|
enable-method = "qcom,kpss-acc-v1";
|
|
device_type = "cpu";
|
|
@@ -34,11 +45,120 @@
|
|
next-level-cache = <&L2>;
|
|
qcom,acc = <&acc1>;
|
|
qcom,saw = <&saw1>;
|
|
+ clocks = <&kraitcc 1>, <&kraitcc 4>;
|
|
+ clock-names = "cpu", "l2";
|
|
+ clock-latency = <100000>;
|
|
+ cpu-supply = <&smb208_s2b>;
|
|
+ cooling-min-state = <0>;
|
|
+ cooling-max-state = <10>;
|
|
+ #cooling-cells = <2>;
|
|
+ cpu-idle-states = <&CPU_SPC>;
|
|
};
|
|
|
|
L2: l2-cache {
|
|
compatible = "cache";
|
|
cache-level = <2>;
|
|
+ qcom,saw = <&saw_l2>;
|
|
+ };
|
|
+
|
|
+ qcom,l2 {
|
|
+ qcom,l2-rates = <384000000 1000000000 1200000000>;
|
|
+ };
|
|
+
|
|
+ idle-states {
|
|
+ CPU_SPC: spc {
|
|
+ compatible = "qcom,idle-state-spc",
|
|
+ "arm,idle-state";
|
|
+ entry-latency-us = <400>;
|
|
+ exit-latency-us = <900>;
|
|
+ min-residency-us = <3000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ thermal-zones {
|
|
+ cpu-thermal0 {
|
|
+ polling-delay-passive = <250>;
|
|
+ polling-delay = <1000>;
|
|
+
|
|
+ thermal-sensors = <&gcc 5>;
|
|
+ coefficients = <1132 0>;
|
|
+
|
|
+ trips {
|
|
+ cpu_alert0: trip0 {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ cpu_crit0: trip1 {
|
|
+ temperature = <110000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cpu-thermal1 {
|
|
+ polling-delay-passive = <250>;
|
|
+ polling-delay = <1000>;
|
|
+
|
|
+ thermal-sensors = <&gcc 6>;
|
|
+ coefficients = <1132 0>;
|
|
+
|
|
+ trips {
|
|
+ cpu_alert1: trip0 {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ cpu_crit1: trip1 {
|
|
+ temperature = <110000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cpu-thermal2 {
|
|
+ polling-delay-passive = <250>;
|
|
+ polling-delay = <1000>;
|
|
+
|
|
+ thermal-sensors = <&gcc 7>;
|
|
+ coefficients = <1199 0>;
|
|
+
|
|
+ trips {
|
|
+ cpu_alert2: trip0 {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ cpu_crit2: trip1 {
|
|
+ temperature = <110000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cpu-thermal3 {
|
|
+ polling-delay-passive = <250>;
|
|
+ polling-delay = <1000>;
|
|
+
|
|
+ thermal-sensors = <&gcc 8>;
|
|
+ coefficients = <1132 0>;
|
|
+
|
|
+ trips {
|
|
+ cpu_alert3: trip0 {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "passive";
|
|
+ };
|
|
+ cpu_crit3: trip1 {
|
|
+ temperature = <110000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
};
|
|
};
|
|
|
|
@@ -57,7 +177,7 @@
|
|
no-map;
|
|
};
|
|
|
|
- smem@41000000 {
|
|
+ smem: smem@41000000 {
|
|
reg = <0x41000000 0x200000>;
|
|
no-map;
|
|
};
|
|
@@ -67,13 +187,13 @@
|
|
cxo_board {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
- clock-frequency = <19200000>;
|
|
+ clock-frequency = <25000000>;
|
|
};
|
|
|
|
pxo_board {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
- clock-frequency = <27000000>;
|
|
+ clock-frequency = <25000000>;
|
|
};
|
|
|
|
sleep_clk: sleep_clk {
|
|
@@ -83,6 +203,46 @@
|
|
};
|
|
};
|
|
|
|
+ kraitcc: clock-controller {
|
|
+ compatible = "qcom,krait-cc-v1";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ qcom,pvs {
|
|
+ qcom,pvs-format-a;
|
|
+ qcom,speed0-pvs0-bin-v0 =
|
|
+ < 1400000000 1250000 >,
|
|
+ < 1200000000 1200000 >,
|
|
+ < 1000000000 1150000 >,
|
|
+ < 800000000 1100000 >,
|
|
+ < 600000000 1050000 >,
|
|
+ < 384000000 1000000 >;
|
|
+
|
|
+ qcom,speed0-pvs1-bin-v0 =
|
|
+ < 1400000000 1175000 >,
|
|
+ < 1200000000 1125000 >,
|
|
+ < 1000000000 1075000 >,
|
|
+ < 800000000 1025000 >,
|
|
+ < 600000000 975000 >,
|
|
+ < 384000000 925000 >;
|
|
+
|
|
+ qcom,speed0-pvs2-bin-v0 =
|
|
+ < 1400000000 1125000 >,
|
|
+ < 1200000000 1075000 >,
|
|
+ < 1000000000 1025000 >,
|
|
+ < 800000000 995000 >,
|
|
+ < 600000000 925000 >,
|
|
+ < 384000000 875000 >;
|
|
+
|
|
+ qcom,speed0-pvs3-bin-v0 =
|
|
+ < 1400000000 1050000 >,
|
|
+ < 1200000000 1000000 >,
|
|
+ < 1000000000 950000 >,
|
|
+ < 800000000 900000 >,
|
|
+ < 600000000 850000 >,
|
|
+ < 384000000 800000 >;
|
|
+ };
|
|
+
|
|
soc: soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
@@ -104,6 +264,85 @@
|
|
reg-names = "lpass-lpaif";
|
|
};
|
|
|
|
+ qfprom: qfprom@700000 {
|
|
+ compatible = "qcom,qfprom", "syscon";
|
|
+ reg = <0x00700000 0x1000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+
|
|
+ tsens_calib: calib {
|
|
+ reg = <0x400 0x10>;
|
|
+ };
|
|
+ tsens_backup: backup_calib {
|
|
+ reg = <0x410 0x10>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ compatible = "qcom,rpm-ipq8064";
|
|
+ reg = <0x108000 0x1000>;
|
|
+ qcom,ipc = <&l2cc 0x8 2>;
|
|
+
|
|
+ interrupts = <0 19 0>,
|
|
+ <0 21 0>,
|
|
+ <0 22 0>;
|
|
+ interrupt-names = "ack",
|
|
+ "err",
|
|
+ "wakeup";
|
|
+
|
|
+ clocks = <&gcc RPM_MSG_RAM_H_CLK>;
|
|
+ clock-names = "ram";
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rpmcc: clock-controller {
|
|
+ compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ regulators {
|
|
+ compatible = "qcom,rpm-smb208-regulators";
|
|
+
|
|
+ smb208_s1a: s1a {
|
|
+ regulator-min-microvolt = <1050000>;
|
|
+ regulator-max-microvolt = <1150000>;
|
|
+
|
|
+ qcom,switch-mode-frequency = <1200000>;
|
|
+
|
|
+ };
|
|
+
|
|
+ smb208_s1b: s1b {
|
|
+ regulator-min-microvolt = <1050000>;
|
|
+ regulator-max-microvolt = <1150000>;
|
|
+
|
|
+ qcom,switch-mode-frequency = <1200000>;
|
|
+ };
|
|
+
|
|
+ smb208_s2a: s2a {
|
|
+ regulator-min-microvolt = < 800000>;
|
|
+ regulator-max-microvolt = <1250000>;
|
|
+
|
|
+ qcom,switch-mode-frequency = <1200000>;
|
|
+ };
|
|
+
|
|
+ smb208_s2b: s2b {
|
|
+ regulator-min-microvolt = < 800000>;
|
|
+ regulator-max-microvolt = <1250000>;
|
|
+
|
|
+ qcom,switch-mode-frequency = <1200000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rng@1a500000 {
|
|
+ compatible = "qcom,prng";
|
|
+ reg = <0x1a500000 0x200>;
|
|
+ clocks = <&gcc PRNG_CLK>;
|
|
+ clock-names = "core";
|
|
+ };
|
|
+
|
|
qcom_pinmux: pinmux@800000 {
|
|
compatible = "qcom,ipq8064-pinctrl";
|
|
reg = <0x800000 0x4000>;
|
|
@@ -113,6 +352,34 @@
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupts = <0 16 0x4>;
|
|
+
|
|
+ pcie0_pins: pcie0_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio3";
|
|
+ function = "pcie1_rst";
|
|
+ drive-strength = <2>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie1_pins: pcie1_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio48";
|
|
+ function = "pcie2_rst";
|
|
+ drive-strength = <2>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie2_pins: pcie2_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio63";
|
|
+ function = "pcie3_rst";
|
|
+ drive-strength = <2>;
|
|
+ bias-disable;
|
|
+ output-low;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
intc: interrupt-controller@2000000 {
|
|
@@ -124,8 +391,7 @@
|
|
};
|
|
|
|
timer@200a000 {
|
|
- compatible = "qcom,kpss-timer",
|
|
- "qcom,kpss-wdt-ipq8064", "qcom,msm-timer";
|
|
+ compatible = "qcom,kpss-timer", "qcom,msm-timer";
|
|
interrupts = <1 1 0x301>,
|
|
<1 2 0x301>,
|
|
<1 3 0x301>,
|
|
@@ -142,25 +408,44 @@
|
|
acc0: clock-controller@2088000 {
|
|
compatible = "qcom,kpss-acc-v1";
|
|
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
|
|
+ clock-output-names = "acpu0_aux";
|
|
};
|
|
|
|
acc1: clock-controller@2098000 {
|
|
compatible = "qcom,kpss-acc-v1";
|
|
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
|
|
+ clock-output-names = "acpu1_aux";
|
|
};
|
|
|
|
+ l2cc: clock-controller@2011000 {
|
|
+ compatible = "qcom,kpss-gcc", "syscon";
|
|
+ reg = <0x2011000 0x1000>;
|
|
+ clock-output-names = "acpu_l2_aux";
|
|
+ };
|
|
+
|
|
saw0: regulator@2089000 {
|
|
- compatible = "qcom,saw2";
|
|
+ compatible = "qcom,saw2", "syscon";
|
|
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
|
|
regulator;
|
|
};
|
|
|
|
saw1: regulator@2099000 {
|
|
- compatible = "qcom,saw2";
|
|
+ compatible = "qcom,saw2", "syscon";
|
|
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
|
|
regulator;
|
|
};
|
|
|
|
+ saw_l2: regulator@02012000 {
|
|
+ compatible = "qcom,saw2", "syscon";
|
|
+ reg = <0x02012000 0x1000>;
|
|
+ regulator;
|
|
+ };
|
|
+
|
|
+ sic_non_secure: sic-non-secure@12100000 {
|
|
+ compatible = "syscon";
|
|
+ reg = <0x12100000 0x10000>;
|
|
+ };
|
|
+
|
|
gsbi2: gsbi@12480000 {
|
|
compatible = "qcom,gsbi-v1.0.0";
|
|
cell-index = <2>;
|
|
@@ -174,7 +459,7 @@
|
|
|
|
syscon-tcsr = <&tcsr>;
|
|
|
|
- serial@12490000 {
|
|
+ uart2: serial@12490000 {
|
|
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
|
reg = <0x12490000 0x1000>,
|
|
<0x12480000 0x1000>;
|
|
@@ -212,7 +497,7 @@
|
|
|
|
syscon-tcsr = <&tcsr>;
|
|
|
|
- gsbi4_serial: serial@16340000 {
|
|
+ uart4: serial@16340000 {
|
|
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
|
reg = <0x16340000 0x1000>,
|
|
<0x16300000 0x1000>;
|
|
@@ -249,7 +534,7 @@
|
|
|
|
syscon-tcsr = <&tcsr>;
|
|
|
|
- serial@1a240000 {
|
|
+ uart5: serial@1a240000 {
|
|
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
|
reg = <0x1a240000 0x1000>,
|
|
<0x1a200000 0x1000>;
|
|
@@ -328,8 +613,12 @@
|
|
gcc: clock-controller@900000 {
|
|
compatible = "qcom,gcc-ipq8064";
|
|
reg = <0x00900000 0x4000>;
|
|
+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
|
|
+ nvmem-cell-names = "calib", "calib_backup";
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
+ #power-domain-cells = <1>;
|
|
+ #thermal-sensor-cells = <1>;
|
|
};
|
|
|
|
tcsr: syscon@1a400000 {
|
|
@@ -344,10 +633,259 @@
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
+ sfpb_mutex_block: syscon@1200600 {
|
|
+ compatible = "syscon";
|
|
+ reg = <0x01200600 0x100>;
|
|
+ };
|
|
+
|
|
+ hs_phy_1: phy@100f8800 {
|
|
+ compatible = "qcom,dwc3-hs-usb-phy";
|
|
+ reg = <0x100f8800 0x30>;
|
|
+ clocks = <&gcc USB30_1_UTMI_CLK>;
|
|
+ clock-names = "ref";
|
|
+ #phy-cells = <0>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ ss_phy_1: phy@100f8830 {
|
|
+ compatible = "qcom,dwc3-ss-usb-phy";
|
|
+ reg = <0x100f8830 0x30>;
|
|
+ clocks = <&gcc USB30_1_MASTER_CLK>;
|
|
+ clock-names = "ref";
|
|
+ #phy-cells = <0>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ hs_phy_0: phy@110f8800 {
|
|
+ compatible = "qcom,dwc3-hs-usb-phy";
|
|
+ reg = <0x110f8800 0x30>;
|
|
+ clocks = <&gcc USB30_0_UTMI_CLK>;
|
|
+ clock-names = "ref";
|
|
+ #phy-cells = <0>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ ss_phy_0: phy@110f8830 {
|
|
+ compatible = "qcom,dwc3-ss-usb-phy";
|
|
+ reg = <0x110f8830 0x30>;
|
|
+ clocks = <&gcc USB30_0_MASTER_CLK>;
|
|
+ clock-names = "ref";
|
|
+ #phy-cells = <0>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ usb3_0: usb30@0 {
|
|
+ compatible = "qcom,dwc3";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ clocks = <&gcc USB30_0_MASTER_CLK>;
|
|
+ clock-names = "core";
|
|
+
|
|
+ syscon-tcsr = <&tcsr 0xb0 1>;
|
|
+
|
|
+ ranges;
|
|
+
|
|
+ status = "disabled";
|
|
+
|
|
+ dwc3@11000000 {
|
|
+ compatible = "snps,dwc3";
|
|
+ reg = <0x11000000 0xcd00>;
|
|
+ interrupts = <0 110 0x4>;
|
|
+ phys = <&hs_phy_0>, <&ss_phy_0>;
|
|
+ phy-names = "usb2-phy", "usb3-phy";
|
|
+ dr_mode = "host";
|
|
+ snps,dis_u3_susphy_quirk;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb3_1: usb30@1 {
|
|
+ compatible = "qcom,dwc3";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ clocks = <&gcc USB30_1_MASTER_CLK>;
|
|
+ clock-names = "core";
|
|
+
|
|
+ syscon-tcsr = <&tcsr 0xb0 0>;
|
|
+
|
|
+ ranges;
|
|
+
|
|
+ status = "disabled";
|
|
+
|
|
+ dwc3@10000000 {
|
|
+ compatible = "snps,dwc3";
|
|
+ reg = <0x10000000 0xcd00>;
|
|
+ interrupts = <0 205 0x4>;
|
|
+ phys = <&hs_phy_1>, <&ss_phy_1>;
|
|
+ phy-names = "usb2-phy", "usb3-phy";
|
|
+ dr_mode = "host";
|
|
+ snps,dis_u3_susphy_quirk;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ compatible = "qcom,pcie-v0";
|
|
+ reg = <0x1b500000 0x1000
|
|
+ 0x1b502000 0x80
|
|
+ 0x1b600000 0x100
|
|
+ 0x0ff00000 0x100000>;
|
|
+ reg-names = "dbi", "elbi", "parf", "config";
|
|
+ device_type = "pci";
|
|
+ linux,pci-domain = <0>;
|
|
+ bus-range = <0x00 0xff>;
|
|
+ num-lanes = <1>;
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
|
|
+ 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
|
|
+
|
|
+ interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
|
|
+ interrupt-names = "msi";
|
|
+ #interrupt-cells = <1>;
|
|
+ interrupt-map-mask = <0 0 0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
|
+ <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
|
+ <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
|
+ <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
|
+
|
|
+ clocks = <&gcc PCIE_A_CLK>,
|
|
+ <&gcc PCIE_H_CLK>,
|
|
+ <&gcc PCIE_PHY_CLK>,
|
|
+ <&gcc PCIE_AUX_CLK>,
|
|
+ <&gcc PCIE_ALT_REF_CLK>;
|
|
+ clock-names = "core", "iface", "phy", "aux", "ref";
|
|
+
|
|
+ assigned-clocks = <&gcc PCIE_ALT_REF_CLK>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+
|
|
+ resets = <&gcc PCIE_ACLK_RESET>,
|
|
+ <&gcc PCIE_HCLK_RESET>,
|
|
+ <&gcc PCIE_POR_RESET>,
|
|
+ <&gcc PCIE_PCI_RESET>,
|
|
+ <&gcc PCIE_PHY_RESET>,
|
|
+ <&gcc PCIE_EXT_RESET>;
|
|
+ reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
|
|
+
|
|
+ pinctrl-0 = <&pcie0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ compatible = "qcom,pcie-v0";
|
|
+ reg = <0x1b700000 0x1000
|
|
+ 0x1b702000 0x80
|
|
+ 0x1b800000 0x100
|
|
+ 0x31f00000 0x100000>;
|
|
+ reg-names = "dbi", "elbi", "parf", "config";
|
|
+ device_type = "pci";
|
|
+ linux,pci-domain = <1>;
|
|
+ bus-range = <0x00 0xff>;
|
|
+ num-lanes = <1>;
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
|
|
+ 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
|
|
+
|
|
+ interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
|
|
+ interrupt-names = "msi";
|
|
+ #interrupt-cells = <1>;
|
|
+ interrupt-map-mask = <0 0 0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
|
+ <0 0 0 2 &intc 0 59 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
|
+ <0 0 0 3 &intc 0 60 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
|
+ <0 0 0 4 &intc 0 61 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
|
+
|
|
+ clocks = <&gcc PCIE_1_A_CLK>,
|
|
+ <&gcc PCIE_1_H_CLK>,
|
|
+ <&gcc PCIE_1_PHY_CLK>,
|
|
+ <&gcc PCIE_1_AUX_CLK>,
|
|
+ <&gcc PCIE_1_ALT_REF_CLK>;
|
|
+ clock-names = "core", "iface", "phy", "aux", "ref";
|
|
+
|
|
+ assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+
|
|
+ resets = <&gcc PCIE_1_ACLK_RESET>,
|
|
+ <&gcc PCIE_1_HCLK_RESET>,
|
|
+ <&gcc PCIE_1_POR_RESET>,
|
|
+ <&gcc PCIE_1_PCI_RESET>,
|
|
+ <&gcc PCIE_1_PHY_RESET>,
|
|
+ <&gcc PCIE_1_EXT_RESET>;
|
|
+ reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
|
|
+
|
|
+ pinctrl-0 = <&pcie1_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pcie2: pci@1b900000 {
|
|
+ compatible = "qcom,pcie-v0";
|
|
+ reg = <0x1b900000 0x1000
|
|
+ 0x1b902000 0x80
|
|
+ 0x1ba00000 0x100
|
|
+ 0x35f00000 0x100000>;
|
|
+ reg-names = "dbi", "elbi", "parf", "config";
|
|
+ device_type = "pci";
|
|
+ linux,pci-domain = <2>;
|
|
+ bus-range = <0x00 0xff>;
|
|
+ num-lanes = <1>;
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
|
|
+ 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
|
|
+
|
|
+ interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
|
|
+ interrupt-names = "msi";
|
|
+ #interrupt-cells = <1>;
|
|
+ interrupt-map-mask = <0 0 0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
|
+ <0 0 0 2 &intc 0 73 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
|
+ <0 0 0 3 &intc 0 74 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
|
+ <0 0 0 4 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
|
+
|
|
+ clocks = <&gcc PCIE_2_A_CLK>,
|
|
+ <&gcc PCIE_2_H_CLK>,
|
|
+ <&gcc PCIE_2_PHY_CLK>,
|
|
+ <&gcc PCIE_2_AUX_CLK>,
|
|
+ <&gcc PCIE_2_ALT_REF_CLK>;
|
|
+ clock-names = "core", "iface", "phy", "aux", "ref";
|
|
+
|
|
+ assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+
|
|
+ resets = <&gcc PCIE_2_ACLK_RESET>,
|
|
+ <&gcc PCIE_2_HCLK_RESET>,
|
|
+ <&gcc PCIE_2_POR_RESET>,
|
|
+ <&gcc PCIE_2_PCI_RESET>,
|
|
+ <&gcc PCIE_2_PHY_RESET>,
|
|
+ <&gcc PCIE_2_EXT_RESET>;
|
|
+ reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
|
|
+
|
|
+ pinctrl-0 = <&pcie2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
adm_dma: dma@18300000 {
|
|
compatible = "qcom,adm";
|
|
reg = <0x18300000 0x100000>;
|
|
- interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
|
|
+ interrupts = <0 170 0>;
|
|
#dma-cells = <1>;
|
|
|
|
clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
|
|
@@ -365,7 +903,7 @@
|
|
};
|
|
|
|
nand@1ac00000 {
|
|
- compatible = "qcom,ipq806x-nand";
|
|
+ compatible = "qcom,ebi2-nandc";
|
|
reg = <0x1ac00000 0x800>;
|
|
|
|
clocks = <&gcc EBI2_CLK>,
|
|
@@ -380,5 +918,103 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ nss_common: syscon@03000000 {
|
|
+ compatible = "syscon";
|
|
+ reg = <0x03000000 0x0000FFFF>;
|
|
+ };
|
|
+
|
|
+ qsgmii_csr: syscon@1bb00000 {
|
|
+ compatible = "syscon";
|
|
+ reg = <0x1bb00000 0x000001FF>;
|
|
+ };
|
|
+
|
|
+ gmac0: ethernet@37000000 {
|
|
+ device_type = "network";
|
|
+ compatible = "qcom,ipq806x-gmac";
|
|
+ reg = <0x37000000 0x200000>;
|
|
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "macirq";
|
|
+
|
|
+ qcom,nss-common = <&nss_common>;
|
|
+ qcom,qsgmii-csr = <&qsgmii_csr>;
|
|
+
|
|
+ clocks = <&gcc GMAC_CORE1_CLK>;
|
|
+ clock-names = "stmmaceth";
|
|
+
|
|
+ resets = <&gcc GMAC_CORE1_RESET>;
|
|
+ reset-names = "stmmaceth";
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ device_type = "network";
|
|
+ compatible = "qcom,ipq806x-gmac";
|
|
+ reg = <0x37200000 0x200000>;
|
|
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "macirq";
|
|
+
|
|
+ qcom,nss-common = <&nss_common>;
|
|
+ qcom,qsgmii-csr = <&qsgmii_csr>;
|
|
+
|
|
+ clocks = <&gcc GMAC_CORE2_CLK>;
|
|
+ clock-names = "stmmaceth";
|
|
+
|
|
+ resets = <&gcc GMAC_CORE2_RESET>;
|
|
+ reset-names = "stmmaceth";
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ device_type = "network";
|
|
+ compatible = "qcom,ipq806x-gmac";
|
|
+ reg = <0x37400000 0x200000>;
|
|
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "macirq";
|
|
+
|
|
+ qcom,nss-common = <&nss_common>;
|
|
+ qcom,qsgmii-csr = <&qsgmii_csr>;
|
|
+
|
|
+ clocks = <&gcc GMAC_CORE3_CLK>;
|
|
+ clock-names = "stmmaceth";
|
|
+
|
|
+ resets = <&gcc GMAC_CORE3_RESET>;
|
|
+ reset-names = "stmmaceth";
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ gmac3: ethernet@37600000 {
|
|
+ device_type = "network";
|
|
+ compatible = "qcom,ipq806x-gmac";
|
|
+ reg = <0x37600000 0x200000>;
|
|
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "macirq";
|
|
+
|
|
+ qcom,nss-common = <&nss_common>;
|
|
+ qcom,qsgmii-csr = <&qsgmii_csr>;
|
|
+
|
|
+ clocks = <&gcc GMAC_CORE4_CLK>;
|
|
+ clock-names = "stmmaceth";
|
|
+
|
|
+ resets = <&gcc GMAC_CORE4_RESET>;
|
|
+ reset-names = "stmmaceth";
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sfpb_mutex: sfpb-mutex {
|
|
+ compatible = "qcom,sfpb-mutex";
|
|
+ syscon = <&sfpb_mutex_block 4 4>;
|
|
+
|
|
+ #hwlock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ smem {
|
|
+ compatible = "qcom,smem";
|
|
+ memory-region = <&smem>;
|
|
+ hwlocks = <&sfpb_mutex 3>;
|
|
};
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
|
|
@@ -0,0 +1,399 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Linksys EA8500 WiFi Router";
|
|
+ compatible = "linksys,ea8500", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0x1e000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power;
|
|
+ led-failsafe = &power;
|
|
+ led-running = &power;
|
|
+ led-upgrade = &power;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "console=ttyMSM0,115200n8";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio65", "gpio67", "gpio68";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio53", "gpio54";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ pcie2: pci@1b900000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ SBL1@0 {
|
|
+ label = "SBL1";
|
|
+ reg = <0x0000000 0x0040000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ MIBIB@40000 {
|
|
+ label = "MIBIB";
|
|
+ reg = <0x0040000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL2@180000 {
|
|
+ label = "SBL2";
|
|
+ reg = <0x0180000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL3@2c0000 {
|
|
+ label = "SBL3";
|
|
+ reg = <0x02c0000 0x0280000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ DDRCONFIG@540000 {
|
|
+ label = "DDRCONFIG";
|
|
+ reg = <0x0540000 0x0120000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SSD@660000 {
|
|
+ label = "SSD";
|
|
+ reg = <0x0660000 0x0120000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ TZ@780000 {
|
|
+ label = "TZ";
|
|
+ reg = <0x0780000 0x0280000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ RPM@a00000 {
|
|
+ label = "RPM";
|
|
+ reg = <0x0a00000 0x0280000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@c80000 {
|
|
+ label = "art";
|
|
+ reg = <0x0c80000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@dc0000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0dc0000 0x0100000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ u_env@ec0000 {
|
|
+ label = "u_env";
|
|
+ reg = <0x0ec0000 0x0040000>;
|
|
+ };
|
|
+
|
|
+ s_env@f00000 {
|
|
+ label = "s_env";
|
|
+ reg = <0x0f00000 0x0040000>;
|
|
+ };
|
|
+
|
|
+ devinfo@f40000 {
|
|
+ label = "devinfo";
|
|
+ reg = <0x0f40000 0x0040000>;
|
|
+ };
|
|
+
|
|
+ linux@f80000 {
|
|
+ label = "kernel1";
|
|
+ reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
|
|
+ };
|
|
+
|
|
+ rootfs@1280000 {
|
|
+ label = "rootfs1";
|
|
+ reg = <0x1280000 0x2500000>;
|
|
+ };
|
|
+
|
|
+ linux2@3780000 {
|
|
+ label = "kernel2";
|
|
+ reg = <0x3780000 0x2800000>;
|
|
+ };
|
|
+
|
|
+ rootfs2@3a80000 {
|
|
+ label = "rootfs2";
|
|
+ reg = <0x3a80000 0x2500000>;
|
|
+ };
|
|
+
|
|
+ syscfg@5f80000 {
|
|
+ label = "syscfg";
|
|
+ reg = <0x5f80000 0x2080000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+ qcom,phy_mdio_addr = <4>;
|
|
+ qcom,poll_required = <1>;
|
|
+ qcom,rgmii_delay = <0>;
|
|
+ qcom,emulation = <0>;
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+ //lan
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+ qcom,phy_mdio_addr = <0>; /* none */
|
|
+ qcom,poll_required = <0>; /* no polling */
|
|
+ qcom,rgmii_delay = <0>;
|
|
+ qcom,emulation = <0>;
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ adm_dma: dma@18300000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART >;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wps {
|
|
+ label = "ea8500:green:wps";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ label = "ea8500:white:power";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ label = "ea8500:green:wifi";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
|
|
@@ -0,0 +1,373 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Netgear Nighthawk X4 R7500";
|
|
+ compatible = "netgear,r7500", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0xe000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power_white;
|
|
+ led-failsafe = &power_amber;
|
|
+ led-running = &power_white;
|
|
+ led-upgrade = &power_amber;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "rootfstype=squashfs noinitrd";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio54", "gpio65";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
|
|
+ "gpio24","gpio26", "gpio53", "gpio64";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ qcadata@0 {
|
|
+ label = "qcadata";
|
|
+ reg = <0x0000000 0x0c80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@c80000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0c80000 0x0500000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@1180000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x1180000 0x0080000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@1200000 {
|
|
+ label = "art";
|
|
+ reg = <0x1200000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@1340000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x1340000 0x0200000>;
|
|
+ };
|
|
+
|
|
+ ubi@1540000 {
|
|
+ label = "ubi";
|
|
+ reg = <0x1540000 0x1800000>;
|
|
+ };
|
|
+
|
|
+ netgear@2d40000 {
|
|
+ label = "netgear";
|
|
+ reg = <0x2d40000 0x0c00000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ reserve@3940000 {
|
|
+ label = "reserve";
|
|
+ reg = <0x3940000 0x46c0000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ firmware@1340000 {
|
|
+ label = "firmware";
|
|
+ reg = <0x1340000 0x1a00000>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&art 6>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&art 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ usb1 {
|
|
+ label = "r7500:white:usb1";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb2 {
|
|
+ label = "r7500:white:usb2";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power_amber: power_amber {
|
|
+ label = "r7500:amber:power";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_white {
|
|
+ label = "r7500:white:wan";
|
|
+ gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_amber {
|
|
+ label = "r7500:amber:wan";
|
|
+ gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "r7500:white:wps";
|
|
+ gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ esata {
|
|
+ label = "r7500:white:esata";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power_white: power_white {
|
|
+ label = "r7500:white:power";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ label = "r7500:white:wifi";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
|
|
@@ -0,0 +1,416 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Netgear Nighthawk X4 R7500v2";
|
|
+ compatible = "netgear,r7500v2", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0x1e000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+
|
|
+ rsvd@5fe00000 {
|
|
+ reg = <0x5fe00000 0x200000>;
|
|
+ reusable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power;
|
|
+ led-failsafe = &power;
|
|
+ led-running = &power;
|
|
+ led-upgrade = &power;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "rootfstype=squashfs noinitrd";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio54", "gpio65";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
|
|
+ "gpio24","gpio26", "gpio53", "gpio64";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb0_pwr_en_pins: usb0_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio15";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb1_pwr_en_pins: usb1_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio16", "gpio68";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb0_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb1_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
|
|
+ pinctrl-0 = <&pcie0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
|
|
+ pinctrl-0 = <&pcie1_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ qcadata@0 {
|
|
+ label = "qcadata";
|
|
+ reg = <0x0000000 0x0c80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@c80000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0c80000 0x0500000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@1180000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x1180000 0x0080000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@1200000 {
|
|
+ label = "art";
|
|
+ reg = <0x1200000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ artbak: art@1340000 {
|
|
+ label = "artbak";
|
|
+ reg = <0x1340000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@1480000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x1480000 0x0200000>;
|
|
+ };
|
|
+
|
|
+ ubi@1680000 {
|
|
+ label = "ubi";
|
|
+ reg = <0x1680000 0x1E00000>;
|
|
+ };
|
|
+
|
|
+ netgear@3480000 {
|
|
+ label = "netgear";
|
|
+ reg = <0x3480000 0x4480000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ reserve@7900000 {
|
|
+ label = "reserve";
|
|
+ reg = <0x7900000 0x0700000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ firmware@1480000 {
|
|
+ label = "firmware";
|
|
+ reg = <0x1480000 0x2000000>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&art 6>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&art 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ usb1 {
|
|
+ label = "r7500v2:amber:usb1";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb3 {
|
|
+ label = "r7500v2:amber:usb3";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ status {
|
|
+ label = "r7500v2:amber:status";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ internet {
|
|
+ label = "r7500v2:white:internet";
|
|
+ gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan {
|
|
+ label = "r7500v2:white:wan";
|
|
+ gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "r7500v2:white:wps";
|
|
+ gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ esata {
|
|
+ label = "r7500v2:white:esata";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ label = "r7500v2:white:power";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ label = "r7500v2:white:wifi";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
|
|
@@ -0,0 +1,425 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "TP-Link Archer VR2600v";
|
|
+ compatible = "tplink,vr2600v", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0x1e000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power;
|
|
+ led-failsafe = &general;
|
|
+ led-running = &power;
|
|
+ led-upgrade = &general;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
|
|
+ "gpio26", "gpio53", "gpio56", "gpio66";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi_pins: spi_pins {
|
|
+ mux {
|
|
+ pins = "gpio18", "gpio19", "gpio21";
|
|
+ function = "gsbi5";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ data {
|
|
+ pins = "gpio18", "gpio19";
|
|
+ drive-strength = <10>;
|
|
+ };
|
|
+
|
|
+ cs {
|
|
+ pins = "gpio20";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio21";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ gsbi5: gsbi@1a200000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+
|
|
+ spi4: spi@1a280000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&spi_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ flash: W25Q128@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ spi-max-frequency = <50000000>;
|
|
+ reg = <0>;
|
|
+
|
|
+ SBL1@0 {
|
|
+ label = "SBL1";
|
|
+ reg = <0x0 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ MIBIB@20000 {
|
|
+ label = "MIBIB";
|
|
+ reg = <0x20000 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL2@40000 {
|
|
+ label = "SBL2";
|
|
+ reg = <0x40000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SBL3@80000 {
|
|
+ label = "SBL3";
|
|
+ reg = <0x80000 0x80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ DDRCONFIG@100000 {
|
|
+ label = "DDRCONFIG";
|
|
+ reg = <0x100000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ SSD@110000 {
|
|
+ label = "SSD";
|
|
+ reg = <0x110000 0x10000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ TZ@120000 {
|
|
+ label = "TZ";
|
|
+ reg = <0x120000 0x80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ RPM@1a0000 {
|
|
+ label = "RPM";
|
|
+ reg = <0x1a0000 0x80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@220000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x220000 0x80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@2a0000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x2a0000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ OLDART@2e0000 {
|
|
+ label = "OLDART";
|
|
+ reg = <0x2e0000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@320000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x320000 0x200000>;
|
|
+ };
|
|
+
|
|
+ rootfs@520000 {
|
|
+ label = "rootfs";
|
|
+ reg = <0x520000 0xa60000>;
|
|
+ };
|
|
+
|
|
+ defaultmac: default-mac@0xfaf100 {
|
|
+ label = "default-mac";
|
|
+ reg = <0xfaf100 0x00200>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ ART@fc0000 {
|
|
+ label = "ART";
|
|
+ reg = <0xfc0000 0x40000>;
|
|
+ read-only;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&defaultmac 0>;
|
|
+ mtd-mac-address-increment = <1>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&defaultmac 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+
|
|
+ dect {
|
|
+ label = "dect";
|
|
+ gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_PHONE>;
|
|
+ };
|
|
+
|
|
+ ledswitch {
|
|
+ label = "ledswitch";
|
|
+ gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_LIGHTS_TOGGLE>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ dsl {
|
|
+ label = "vr2600v:white:dsl";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ label = "vr2600v:white:usb";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ lan {
|
|
+ label = "vr2600v:white:lan";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wlan2g {
|
|
+ label = "vr2600v:white:wlan2g";
|
|
+ gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wlan5g {
|
|
+ label = "vr2600v:white:wlan5g";
|
|
+ gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ label = "vr2600v:white:power";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ phone {
|
|
+ label = "vr2600v:white:phone";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan {
|
|
+ label = "vr2600v:white:wan";
|
|
+ gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ general: general {
|
|
+ label = "vr2600v:white:general";
|
|
+ gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
|
|
@@ -0,0 +1,153 @@
|
|
+#include "qcom-ipq8064.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Qualcomm IPQ8065";
|
|
+ compatible = "qcom,ipq8065", "qcom,ipq8064";
|
|
+
|
|
+ qcom,pvs {
|
|
+ qcom,pvs-format-a;
|
|
+ qcom,speed0-pvs0-bin-v0 =
|
|
+ < 1725000000 1262500 >,
|
|
+ < 1400000000 1175000 >,
|
|
+ < 1000000000 1100000 >,
|
|
+ < 800000000 1050000 >,
|
|
+ < 600000000 1000000 >,
|
|
+ < 384000000 975000 >;
|
|
+ qcom,speed0-pvs1-bin-v0 =
|
|
+ < 1725000000 1225000 >,
|
|
+ < 1400000000 1150000 >,
|
|
+ < 1000000000 1075000 >,
|
|
+ < 800000000 1025000 >,
|
|
+ < 600000000 975000 >,
|
|
+ < 384000000 950000 >;
|
|
+ qcom,speed0-pvs2-bin-v0 =
|
|
+ < 1725000000 1200000 >,
|
|
+ < 1400000000 1125000 >,
|
|
+ < 1000000000 1050000 >,
|
|
+ < 800000000 1000000 >,
|
|
+ < 600000000 950000 >,
|
|
+ < 384000000 925000 >;
|
|
+ qcom,speed0-pvs3-bin-v0 =
|
|
+ < 1725000000 1175000 >,
|
|
+ < 1400000000 1100000 >,
|
|
+ < 1000000000 1025000 >,
|
|
+ < 800000000 975000 >,
|
|
+ < 600000000 925000 >,
|
|
+ < 384000000 900000 >;
|
|
+ qcom,speed0-pvs4-bin-v0 =
|
|
+ < 1725000000 1150000 >,
|
|
+ < 1400000000 1075000 >,
|
|
+ < 1000000000 1000000 >,
|
|
+ < 800000000 950000 >,
|
|
+ < 600000000 900000 >,
|
|
+ < 384000000 875000 >;
|
|
+ qcom,speed0-pvs5-bin-v0 =
|
|
+ < 1725000000 1100000 >,
|
|
+ < 1400000000 1025000 >,
|
|
+ < 1000000000 950000 >,
|
|
+ < 800000000 900000 >,
|
|
+ < 600000000 850000 >,
|
|
+ < 384000000 825000 >;
|
|
+ qcom,speed0-pvs6-bin-v0 =
|
|
+ < 1725000000 1050000 >,
|
|
+ < 1400000000 975000 >,
|
|
+ < 1000000000 900000 >,
|
|
+ < 800000000 850000 >,
|
|
+ < 600000000 800000 >,
|
|
+ < 384000000 775000 >;
|
|
+ };
|
|
+
|
|
+ soc: soc {
|
|
+
|
|
+ rpm@108000 {
|
|
+
|
|
+ regulators {
|
|
+
|
|
+ smb208_s2a: s2a {
|
|
+ regulator-min-microvolt = <775000>;
|
|
+ regulator-max-microvolt = <1275000>;
|
|
+ };
|
|
+
|
|
+ smb208_s2b: s2b {
|
|
+ regulator-min-microvolt = <775000>;
|
|
+ regulator-max-microvolt = <1275000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* Temporary fixed regulator */
|
|
+ vsdcc_fixed: vsdcc-regulator {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "SDCC Power";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ sdcc1bam:dma@12402000 {
|
|
+ compatible = "qcom,bam-v1.3.0";
|
|
+ reg = <0x12402000 0x8000>;
|
|
+ interrupts = <0 98 0>;
|
|
+ clocks = <&gcc SDC1_H_CLK>;
|
|
+ clock-names = "bam_clk";
|
|
+ #dma-cells = <1>;
|
|
+ qcom,ee = <0>;
|
|
+ };
|
|
+
|
|
+ sdcc3bam:dma@12182000 {
|
|
+ compatible = "qcom,bam-v1.3.0";
|
|
+ reg = <0x12182000 0x8000>;
|
|
+ interrupts = <0 96 0>;
|
|
+ clocks = <&gcc SDC3_H_CLK>;
|
|
+ clock-names = "bam_clk";
|
|
+ #dma-cells = <1>;
|
|
+ qcom,ee = <0>;
|
|
+ };
|
|
+
|
|
+ amba {
|
|
+ compatible = "arm,amba-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ sdcc1: sdcc@12400000 {
|
|
+ status = "disabled";
|
|
+ compatible = "arm,pl18x", "arm,primecell";
|
|
+ arm,primecell-periphid = <0x00051180>;
|
|
+ reg = <0x12400000 0x2000>;
|
|
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "cmd_irq";
|
|
+ clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
|
|
+ clock-names = "mclk", "apb_pclk";
|
|
+ bus-width = <8>;
|
|
+ max-frequency = <96000000>;
|
|
+ non-removable;
|
|
+ cap-sd-highspeed;
|
|
+ cap-mmc-highspeed;
|
|
+ vmmc-supply = <&vsdcc_fixed>;
|
|
+ dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
|
|
+ dma-names = "tx", "rx";
|
|
+ };
|
|
+
|
|
+ sdcc3: sdcc@12180000 {
|
|
+ compatible = "arm,pl18x", "arm,primecell";
|
|
+ arm,primecell-periphid = <0x00051180>;
|
|
+ status = "disabled";
|
|
+ reg = <0x12180000 0x2000>;
|
|
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "cmd_irq";
|
|
+ clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
|
|
+ clock-names = "mclk", "apb_pclk";
|
|
+ bus-width = <8>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-mmc-highspeed;
|
|
+ max-frequency = <192000000>;
|
|
+ #mmc-ddr-1_8v;
|
|
+ sd-uhs-sdr104;
|
|
+ sd-uhs-ddr50;
|
|
+ vqmmc-supply = <&vsdcc_fixed>;
|
|
+ dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
|
|
+ dma-names = "tx", "rx";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
|
|
@@ -0,0 +1,388 @@
|
|
+#include "qcom-ipq8065-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "ZyXEL NBG6817";
|
|
+ compatible = "zyxel,nbg6817", "qcom,ipq8065";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0x1e000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+ sdcc1 = &sdcc1;
|
|
+
|
|
+ led-boot = &power;
|
|
+ led-failsafe = &power;
|
|
+ led-running = &power;
|
|
+ led-upgrade = &power;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "root=/dev/mmcblk0p5 rootfstype=squashfs,ext4 rootwait noinitrd";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio54", "gpio65";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ mux {
|
|
+ pins = "gpio9", "gpio26", "gpio33", "gpio64";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-down;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio1";
|
|
+ input-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ tx {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
|
|
+ input-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi_pins: spi_pins {
|
|
+ mux {
|
|
+ pins = "gpio18", "gpio19", "gpio21";
|
|
+ function = "gsbi5";
|
|
+ drive-strength = <10>;
|
|
+ bias-none;
|
|
+ };
|
|
+
|
|
+ cs {
|
|
+ pins = "gpio20";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb0_pwr_en_pins: usb0_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio16", "gpio17";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ pwr {
|
|
+ pins = "gpio17";
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+
|
|
+ ovc {
|
|
+ pins = "gpio16";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb1_pwr_en_pins: usb1_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio14", "gpio15";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ pwr {
|
|
+ pins = "gpio14";
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+
|
|
+ ovc {
|
|
+ pins = "gpio15";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ gsbi5: gsbi@1a200000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+
|
|
+ spi4: spi@1a280000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&spi_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ flash: m25p80@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ spi-max-frequency = <51200000>;
|
|
+ reg = <0>;
|
|
+
|
|
+ linux,part-probe = "qcom-smem";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb0_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb1_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
|
|
+ pinctrl-0 = <&pcie0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
|
|
+ pinctrl-0 = <&pcie1_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
|
|
+ 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
|
|
+ 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
|
|
+ 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
|
|
+ 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
|
|
+ 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
|
|
+ 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
|
|
+ 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
|
|
+ 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
|
|
+ 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
|
|
+ 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
|
|
+ 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
|
|
+ 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
|
|
+ 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+ qcom,phy_mdio_addr = <4>;
|
|
+ qcom,poll_required = <0>;
|
|
+ qcom,rgmii_delay = <1>;
|
|
+ qcom,phy_mii_type = <0>;
|
|
+ qcom,emulation = <0>;
|
|
+ qcom,irq = <255>;
|
|
+ mdiobus = <&mdio0>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+ qcom,phy_mdio_addr = <0>; /* none */
|
|
+ qcom,poll_required = <0>; /* no polling */
|
|
+ qcom,rgmii_delay = <0>;
|
|
+ qcom,phy_mii_type = <1>;
|
|
+ qcom,emulation = <0>;
|
|
+ qcom,irq = <258>;
|
|
+ mdiobus = <&mdio0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ amba {
|
|
+ sdcc1: sdcc@12400000 {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ internet {
|
|
+ label = "nbg6817:white:internet";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ label = "nbg6817:white:power";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ wifi2g {
|
|
+ label = "nbg6817:amber:wifi2g";
|
|
+ gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ /* wifi2g amber from the manual is missing */
|
|
+
|
|
+ wifi5g {
|
|
+ label = "nbg6817:amber:wifi5g";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ /* wifi5g amber from the manual is missing */
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
|
|
@@ -0,0 +1,566 @@
|
|
+#include "qcom-ipq8065-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Netgear Nighthawk X4S R7800";
|
|
+ compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0x1e000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+
|
|
+ rsvd@5fe00000 {
|
|
+ reg = <0x5fe00000 0x200000>;
|
|
+ reusable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+
|
|
+ led-boot = &power_white;
|
|
+ led-failsafe = &power_amber;
|
|
+ led-running = &power_white;
|
|
+ led-upgrade = &power_amber;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ button_pins: button_pins {
|
|
+ mux {
|
|
+ pins = "gpio6", "gpio54", "gpio65";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ mux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ drive-strength = <12>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins: led_pins {
|
|
+ pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
|
|
+ "gpio24","gpio26", "gpio53", "gpio64";
|
|
+ function = "gpio";
|
|
+ drive-strength = <2>;
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio1";
|
|
+ input-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ tx {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
|
|
+ input-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi_pins: spi_pins {
|
|
+ mux {
|
|
+ pins = "gpio18", "gpio19", "gpio21";
|
|
+ function = "gsbi5";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ data {
|
|
+ pins = "gpio18", "gpio19";
|
|
+ drive-strength = <10>;
|
|
+ };
|
|
+
|
|
+ cs {
|
|
+ pins = "gpio20";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio21";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi6_pins: spi6_pins {
|
|
+ mux {
|
|
+ pins = "gpio55", "gpio56", "gpio58";
|
|
+ function = "gsbi6";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ mosi {
|
|
+ pins = "gpio55";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ miso {
|
|
+ pins = "gpio56";
|
|
+ drive-strength = <14>;
|
|
+ };
|
|
+
|
|
+ cs {
|
|
+ pins = "gpio57";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ clk {
|
|
+ pins = "gpio58";
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ pins = "gpio33";
|
|
+ drive-strength = <10>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb0_pwr_en_pins: usb0_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio15";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb1_pwr_en_pins: usb1_pwr_en_pins {
|
|
+ mux {
|
|
+ pins = "gpio16", "gpio68";
|
|
+ function = "gpio";
|
|
+ drive-strength = <12>;
|
|
+ bias-pull-down;
|
|
+ output-high;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ gsbi5: gsbi@1a200000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+
|
|
+ spi5: spi@1a280000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&spi_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ flash: m25p80@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ spi-max-frequency = <50000000>;
|
|
+ reg = <0>;
|
|
+
|
|
+ linux,part-probe = "qcom-smem";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi6: gsbi@16500000 {
|
|
+ qcom,mode = <GSBI_PROT_SPI>;
|
|
+ status = "ok";
|
|
+ spi6: spi@16580000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&spi6_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ spi-nor@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <6000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ ports-implemented = <0x1>;
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb0_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&usb1_pwr_en_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ phy-tx0-term-offset = <7>;
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-ecc-step-size = <512>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ qcadata@0 {
|
|
+ label = "qcadata";
|
|
+ reg = <0x0000000 0x0c80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@c80000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0c80000 0x0500000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@1180000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x1180000 0x0080000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@1200000 {
|
|
+ label = "art";
|
|
+ reg = <0x1200000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ artbak: art@1340000 {
|
|
+ label = "artbak";
|
|
+ reg = <0x1340000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@1480000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x1480000 0x0200000>;
|
|
+ };
|
|
+
|
|
+ ubi@1680000 {
|
|
+ label = "ubi";
|
|
+ reg = <0x1680000 0x1E00000>;
|
|
+ };
|
|
+
|
|
+ netgear@3480000 {
|
|
+ label = "netgear";
|
|
+ reg = <0x3480000 0x4480000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ reserve@7900000 {
|
|
+ label = "reserve";
|
|
+ reg = <0x7900000 0x0700000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ firmware@1480000 {
|
|
+ label = "firmware";
|
|
+ reg = <0x1480000 0x2000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
|
|
+ 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
|
|
+ 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
|
|
+ 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
|
|
+ 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
|
|
+ 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
|
|
+ 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
|
|
+ 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
|
|
+ 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
|
|
+ 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
|
|
+ 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
|
|
+ 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
|
|
+ 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
|
|
+ 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
|
|
+ >;
|
|
+ qca,ar8327-vlans = <
|
|
+ 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
|
|
+ 0x2 0x21 /* VLAN2 Ports 0/5 */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+ qcom,phy_mdio_addr = <4>;
|
|
+ qcom,poll_required = <0>;
|
|
+ qcom,rgmii_delay = <1>;
|
|
+ qcom,phy_mii_type = <0>;
|
|
+ qcom,emulation = <0>;
|
|
+ qcom,irq = <255>;
|
|
+ mdiobus = <&mdio0>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&art 6>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+ qcom,phy_mdio_addr = <0>; /* none */
|
|
+ qcom,poll_required = <0>; /* no polling */
|
|
+ qcom,rgmii_delay = <0>;
|
|
+ qcom,phy_mii_type = <1>;
|
|
+ qcom,emulation = <0>;
|
|
+ qcom,irq = <258>;
|
|
+ mdiobus = <&mdio0>;
|
|
+
|
|
+ mtd-mac-address = <&art 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rpm@108000 {
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-0 = <&button_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RFKILL>;
|
|
+ debounce-interval = <60>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <60>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ debounce-interval = <60>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-0 = <&led_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ power_white: power_white {
|
|
+ label = "r7800:white:power";
|
|
+ gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "keep";
|
|
+ };
|
|
+
|
|
+ power_amber: power_amber {
|
|
+ label = "r7800:amber:power";
|
|
+ gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_white {
|
|
+ label = "r7800:white:wan";
|
|
+ gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_amber {
|
|
+ label = "r7800:amber:wan";
|
|
+ gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb1 {
|
|
+ label = "r7800:white:usb1";
|
|
+ gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ usb2 {
|
|
+ label = "r7800:white:usb2";
|
|
+ gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ esata {
|
|
+ label = "r7800:white:esata";
|
|
+ gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ label = "r7800:white:wifi";
|
|
+ gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "r7800:white:wps";
|
|
+ gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi
|
|
@@ -0,0 +1 @@
|
|
+#include "qcom-ipq8065.dtsi"
|