166 lines
4.1 KiB
Diff
166 lines
4.1 KiB
Diff
From 6b2bb8803f19116bad41a271f9035d4c853f4553 Mon Sep 17 00:00:00 2001
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From: Matthew McClintock <mmcclint@codeaurora.org>
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Date: Thu, 5 May 2016 10:07:11 -0500
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Subject: [PATCH 16/37] spi: qup: allow mulitple DMA transactions per spi xfer
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Much like the block mode changes, we are breaking up DMA transactions
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into 64K chunks so we can reset the QUP engine.
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Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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---
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drivers/spi/spi-qup.c | 120 +++++++++++++++++++++++++++++++++++--------------
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1 file changed, 86 insertions(+), 34 deletions(-)
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--- a/drivers/spi/spi-qup.c
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+++ b/drivers/spi/spi-qup.c
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@@ -566,6 +566,21 @@ static int spi_qup_io_config(struct spi_
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return 0;
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}
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+static unsigned int spi_qup_sgl_get_size(struct scatterlist *sgl, unsigned int nents)
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+{
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+ struct scatterlist *sg;
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+ int i;
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+ unsigned int length = 0;
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+
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+ if (!nents)
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+ return 0;
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+
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+ for_each_sg(sgl, sg, nents, i)
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+ length += sg_dma_len(sg);
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+
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+ return length;
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+}
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+
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static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer,
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unsigned long timeout)
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{
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@@ -573,53 +588,90 @@ unsigned long timeout)
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struct spi_qup *qup = spi_master_get_devdata(master);
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dma_async_tx_callback rx_done = NULL, tx_done = NULL;
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int ret;
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+ struct scatterlist *tx_sgl, *rx_sgl;
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- ret = spi_qup_io_config(spi, xfer);
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- if (ret)
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- return ret;
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-
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- /* before issuing the descriptors, set the QUP to run */
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- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
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- if (ret) {
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- dev_warn(qup->dev, "cannot set RUN state\n");
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- return ret;
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- }
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-
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- if (!qup->qup_v1) {
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- if (xfer->rx_buf)
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- rx_done = spi_qup_dma_done;
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-
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- if (xfer->tx_buf)
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- tx_done = spi_qup_dma_done;
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- }
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-
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- if (xfer->rx_buf) {
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- ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl,
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- xfer->rx_sg.nents, DMA_DEV_TO_MEM,
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- rx_done, &qup->done);
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- if (ret)
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- return ret;
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+ rx_sgl = xfer->rx_sg.sgl;
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+ tx_sgl = xfer->tx_sg.sgl;
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- dma_async_issue_pending(master->dma_rx);
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- }
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+ do {
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+ int rx_nents = 0, tx_nents = 0;
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- if (xfer->tx_buf) {
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- ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl,
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- xfer->tx_sg.nents, DMA_MEM_TO_DEV,
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- tx_done, &qup->dma_tx_done);
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+ if (rx_sgl) {
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+ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER);
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+ if (rx_nents < 0)
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+ rx_nents = sg_nents(rx_sgl);
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+
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+ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) /
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+ qup->w_size;
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+ }
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+
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+ if (tx_sgl) {
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+ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER);
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+ if (tx_nents < 0)
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+ tx_nents = sg_nents(tx_sgl);
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+
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+ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) /
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+ qup->w_size;
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+ }
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+
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+
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+ ret = spi_qup_io_config(spi, xfer);
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if (ret)
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return ret;
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- dma_async_issue_pending(master->dma_tx);
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- }
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+ /* before issuing the descriptors, set the QUP to run */
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+ ret = spi_qup_set_state(qup, QUP_STATE_RUN);
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+ if (ret) {
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+ dev_warn(qup->dev, "cannot set RUN state\n");
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+ return ret;
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+ }
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+
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+ if (!qup->qup_v1) {
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+ if (rx_sgl) {
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+ rx_done = spi_qup_dma_done;
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+ }
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+
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+ if (tx_sgl) {
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+ tx_done = spi_qup_dma_done;
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+ }
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+ }
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+
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+ if (rx_sgl) {
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+ ret = spi_qup_prep_sg(master, rx_sgl, rx_nents,
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+ DMA_DEV_TO_MEM, rx_done,
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+ &qup->done);
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+ if (ret)
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+ return ret;
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+
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+ dma_async_issue_pending(master->dma_rx);
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+ }
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+
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+ if (tx_sgl) {
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+ ret = spi_qup_prep_sg(master, tx_sgl, tx_nents,
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+ DMA_MEM_TO_DEV, tx_done,
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+ &qup->dma_tx_done);
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+ if (ret)
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+ return ret;
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+
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+ dma_async_issue_pending(master->dma_tx);
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+ }
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+
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+ if (rx_sgl && !wait_for_completion_timeout(&qup->done, timeout)) {
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+ pr_emerg(" rx timed out");
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+ return -ETIMEDOUT;
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+ }
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+
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+ if (tx_sgl && !wait_for_completion_timeout(&qup->dma_tx_done, timeout)) {
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+ pr_emerg(" tx timed out\n");
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+ return -ETIMEDOUT;
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+ }
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- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout))
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- return -ETIMEDOUT;
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+ for (; rx_sgl && rx_nents--; rx_sgl = sg_next(rx_sgl));
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+ for (; tx_sgl && tx_nents--; tx_sgl = sg_next(tx_sgl));
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- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout))
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- ret = -ETIMEDOUT;
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+ } while (rx_sgl || tx_sgl);
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- return ret;
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+ return 0;
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}
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static int spi_qup_do_pio(struct spi_device *spi, struct spi_transfer *xfer,
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