openwrtv3/target
Felix Fietkau bc4f2c5ce4 ar71xx: fix ar724x clock calculation
According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz
input clock as the REF_CLK instead of 5MHz.

The correct CPU PLL calculation procedure is as follows:
CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2.

This patch is compatible with the current calculation procedure with default
DIV and REF_DIV values.

Test on both AR7240, AR7241 and AR7242.

Signed-off-by: Weijie Gao <hackpascal@gmail.com>

SVN-Revision: 46856
2015-09-11 16:32:45 +00:00
..
imagebuilder imagebuilder: run build prereq checks before building image to set up host commands properly 2015-09-10 11:06:42 +00:00
linux ar71xx: fix ar724x clock calculation 2015-09-11 16:32:45 +00:00
sdk sdk: provide explicit CONFIG_MODULES kconfig symbol 2015-07-27 23:45:15 +00:00
toolchain toolchain: respect CONFIG_VERSION_FILENAMES and add host system suffix 2015-02-07 21:01:37 +00:00
Config.in build: remove obsolete references to cris and avr32 2015-03-24 10:07:40 +00:00
Makefile