15a14cf166
The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LEDE/OPENWRT will auto strip executable program file while make. So we need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network fiemware be destroyed, then run make to build ls1012ardb firmware. The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message. This issue have noticed the IP owner for investigate, hope he can solve it earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4" bootargs. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
80 lines
2.3 KiB
Diff
80 lines
2.3 KiB
Diff
From 4fcb1d5141ff6d9527ceac9f391e1da4128f5a60 Mon Sep 17 00:00:00 2001
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From: Abhimanyu Saini <abhimanyu.saini@nxp.com>
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Date: Tue, 10 May 2016 09:54:36 +0530
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Subject: [PATCH 28/93] fsl, ls1012a, qixis: Add support for qixis subsystem
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Add support for the printing FPGA build information,
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altbank switching and board reset using qixis subsystem.
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Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
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---
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board/freescale/ls1012aqds/ls1012aqds.c | 20 +++++++++++++++++++-
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include/configs/ls1012aqds.h | 17 +++++++++++++++++
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2 files changed, 36 insertions(+), 1 deletion(-)
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diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
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index 5cb225f..446989b 100644
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--- a/board/freescale/ls1012aqds/ls1012aqds.c
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+++ b/board/freescale/ls1012aqds/ls1012aqds.c
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@@ -44,8 +44,26 @@ static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)
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int checkboard(void)
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{
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- puts("Board: LS1012AQDS\n");
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+ char buf[64];
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+ u8 sw;
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+ sw = QIXIS_READ(arch);
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+ printf("Board Arch: V%d, ", sw >> 4);
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+ printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1);
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+
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+ sw = QIXIS_READ(brdcfg[QIXIS_LBMAP_BRDCFG_REG]);
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+
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+ if (sw & QIXIS_LBMAP_ALTBANK)
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+ printf("flash: 2\n");
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+ else
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+ printf("flash: 1\n");
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+
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+ printf("FPGA: v%d (%s), build %d",
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+ (int)QIXIS_READ(scver), qixis_read_tag(buf),
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+ (int)qixis_read_minor());
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+
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+ /* the timestamp string contains "\n" at the end */
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+ printf(" on %s", qixis_read_time(buf));
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return 0;
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}
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diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
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index 51ca902..de998b8 100644
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--- a/include/configs/ls1012aqds.h
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+++ b/include/configs/ls1012aqds.h
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@@ -26,8 +26,25 @@
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#define SGMII_CARD_PORT4_PHY_ADDR 0x1F
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#endif
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+/*
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+ * QIXIS Definitions
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+ */
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+#define CONFIG_FSL_QIXIS
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+
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+#ifdef CONFIG_FSL_QIXIS
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#define CONFIG_QIXIS_I2C_ACCESS
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#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
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+#define QIXIS_LBMAP_BRDCFG_REG 0x04
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+#define QIXIS_LBMAP_SWITCH 6
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+#define QIXIS_LBMAP_MASK 0xf7
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+#define QIXIS_LBMAP_SHIFT 0
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+#define QIXIS_LBMAP_DFLTBANK 0x00
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+#define QIXIS_LBMAP_ALTBANK 0x08
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+#define QIXIS_RST_CTL_RESET 0x41
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+#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
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+#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
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+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
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+#endif
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/*
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* I2C bus multiplexer
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--
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1.7.9.5
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