openwrtv3/target/linux/lantiq/dts/FRITZ3370.dts
Felix Fietkau 04ad02d132 lantiq: Switch to the new SPI driver
Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
  new SPI driver to configure the SPI pins.
  While here we are also using separate input and output settings so we
  are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
  correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
  the old one did). Thus we have to adjust the devices accordingly.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 48293
2016-01-17 19:56:03 +00:00

280 lines
5.3 KiB
Text

/dts-v1/;
/include/ "vr9.dtsi"
/ {
model = "FRITZ3370 - Fritz!Box WLAN 3370";
chosen {
bootargs = "console=ttyLTQ0,115200 ubi.mtd=1,512 root=/dev/mtdblock9";
leds {
boot = &power_green;
failsafe = &power_red;
running = &power_green;
dsl = &dsl;
internet = &info_green;
wifi = &wifi;
};
};
memory@0 {
reg = <0x0 0x8000000>;
};
fpi@10000000 {
localbus@0 {
nand-parts@0 {
compatible = "gen_nand", "lantiq,nand-xway";
bank-width = <2>;
reg = <1 0x0 0x2000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x400000>;
};
partition@400000 {
label = "rootfs_ubi";
reg = <0x400000 0x3000000>;
};
partition@3400000 {
label = "vr9_firmware";
reg = <0x3400000 0x400000>;
};
partition@3800000 {
label = "reserved";
reg = <0x3800000 0x3000000>;
};
partition@6800000 {
label = "config";
reg = <0x6800000 0x200000>;
};
partition@6a00000 {
label = "nand-filesystem";
reg = <0x6a00000 0x1600000>;
};
};
};
gpio: pinmux@E100B10 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
nand {
lantiq,groups = "nand cle", "nand ale",
"nand rd", "nand cs1", "nand rdy";
lantiq,function = "ebu";
lantiq,pull = <1>;
};
phy-rst {
lantiq,pins = "io37", "io44";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
eth@E108000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-net";
reg = < 0xE108000 0x3000 /* switch */
0xE10B100 0x70 /* mdio */
0xE10B1D8 0x30 /* mii */
0xE10B308 0x30 /* pmac */
>;
interrupt-parent = <&icu0>;
interrupts = <73 72>;
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mac-address = [ 00 11 22 33 44 55 ];
lantiq,switch;
ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
gpios = <&gpio 37 0>;
};
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <1>;
phy-mode = "rgmii";
phy-handle = <&phy1>;
gpios = <&gpio 44 0>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "gmii";
phy-handle = <&phy11>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy1: ethernet-phy@1 {
reg = <0x1>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
ifxhcd@E101000 {
status = "okay";
gpios = <&gpio 5 0
&gpio 14 0>;
lantiq,portmask = <0x3>;
};
};
ath9k_eep {
compatible = "ath9k,eeprom";
ath,eep-flash = <&ath9k_cal 0x985>;
ath,eep-endian;
ath,eep-swap;
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
firmware = "lantiq/vr9_phy11g_a1x.bin";
phys = [ 00 01 ];
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
power {
label = "power";
gpios = <&gpio 1 0>;
linux,code = <0x100>;
};
/* wifi {
label = "wifi";
gpios = <&gpio 29 0>;
linux,code = <0x101>;
};*/
};
gpio-leds {
compatible = "gpio-leds";
power_green: power {
label = "fritz3370:green:power";
gpios = <&gpio 32 1>;
default-state = "keep";
};
power_red: power2 {
label = "fritz3370:red:power";
gpios = <&gpio 33 1>;
};
info_red {
label = "fritz3370:red:info";
gpios = <&gpio 34 1>;
};
wifi: wifi {
label = "fritz3370:green:wlan";
gpios = <&gpio 35 1>;
};
dsl: dsl {
label = "fritz3370:green:dsl";
gpios = <&gpio 36 1>;
};
lan {
label = "fritz3370:green:lan";
gpios = <&gpio 38 1>;
};
info_green: info_green {
label = "fritz3370:green:info";
gpios = <&gpio 47 1>;
};
};
};
&spi {
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
status = "ok";
m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <4 0>;
spi-max-frequency = <1000000>;
ath9k_cal: partition@0 {
reg = <0x0 0x20000>;
label = "urlader";
read-only;
};
partition@20000 {
reg = <0x20000 0x10000>;
label = "tffs (1)";
read-only;
};
partition@30000 {
reg = <0x30000 0x10000>;
label = "tffs (2)";
read-only;
};
};
};