635 lines
19 KiB
C
635 lines
19 KiB
C
/*
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* ADM5120 built in ethernet switch driver
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*
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* Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
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*
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* Inspiration for this driver came from the original ADMtek 2.4
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* driver, Copyright ADMtek Inc.
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*
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* NAPI extensions by Thomas Langer (Thomas.Langer@infineon.com)
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* and Friedrich Beckmann (Friedrich.Beckmann@infineon.com), 2007
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*
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* TODO: Add support of high prio queues (currently disabled)
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*
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*/
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#include <linux/autoconf.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <asm/mipsregs.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include "adm5120sw.h"
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#include <asm/mach-adm5120/adm5120_info.h>
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#include <asm/mach-adm5120/adm5120_irq.h>
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MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
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MODULE_DESCRIPTION("ADM5120 ethernet switch driver");
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MODULE_LICENSE("GPL");
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/*
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* The ADM5120 uses an internal matrix to determine which ports
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* belong to which VLAN.
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* The default generates a VLAN (and device) for each port
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* (including MII port) and the CPU port is part of all of them.
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*
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* Another example, one big switch and everything mapped to eth0:
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* 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00
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*/
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static unsigned char vlan_matrix[SW_DEVS] = {
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0x41, 0x42, 0x44, 0x48, 0x50, 0x60
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};
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/* default settings - unlimited TX and RX on all ports, default shaper mode */
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static unsigned char bw_matrix[SW_DEVS] = {
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0, 0, 0, 0, 0, 0
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};
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static int adm5120_nrdevs;
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static struct net_device *adm5120_devs[SW_DEVS];
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/* Lookup table port -> device */
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static struct net_device *adm5120_port[SW_DEVS];
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static struct adm5120_dma
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adm5120_dma_txh_v[ADM5120_DMA_TXH] __attribute__((aligned(16))),
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adm5120_dma_txl_v[ADM5120_DMA_TXL] __attribute__((aligned(16))),
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adm5120_dma_rxh_v[ADM5120_DMA_RXH] __attribute__((aligned(16))),
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adm5120_dma_rxl_v[ADM5120_DMA_RXL] __attribute__((aligned(16))),
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*adm5120_dma_txh,
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*adm5120_dma_txl,
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*adm5120_dma_rxh,
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*adm5120_dma_rxl;
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static struct sk_buff
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*adm5120_skb_rxh[ADM5120_DMA_RXH],
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*adm5120_skb_rxl[ADM5120_DMA_RXL],
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*adm5120_skb_txh[ADM5120_DMA_TXH],
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*adm5120_skb_txl[ADM5120_DMA_TXL];
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static int adm5120_rxli = 0;
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static int adm5120_txli = 0;
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/*static int adm5120_txhi = 0;*/
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static int adm5120_if_open = 0;
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static inline void adm5120_set_reg(unsigned int reg, unsigned long val)
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{
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*(volatile unsigned long*)(SW_BASE+reg) = val;
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}
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static inline unsigned long adm5120_get_reg(unsigned int reg)
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{
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return *(volatile unsigned long*)(SW_BASE+reg);
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}
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static inline void adm5120_rx_dma_update(struct adm5120_dma *dma,
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struct sk_buff *skb, int end)
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{
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dma->status = 0;
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dma->cntl = 0;
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dma->len = ADM5120_DMA_RXSIZE;
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dma->data = ADM5120_DMA_ADDR(skb->data) |
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ADM5120_DMA_OWN | (end ? ADM5120_DMA_RINGEND : 0);
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}
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static int adm5120_rx(struct net_device *dev,int *budget)
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{
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struct sk_buff *skb, *skbn;
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struct adm5120_sw *priv;
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struct net_device *cdev;
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struct adm5120_dma *dma;
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int port, len, quota;
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quota = min(dev->quota, *budget);
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dma = &adm5120_dma_rxl[adm5120_rxli];
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while (!(dma->data & ADM5120_DMA_OWN) && quota) {
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port = (dma->status & ADM5120_DMA_PORTID);
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port >>= ADM5120_DMA_PORTSHIFT;
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cdev = adm5120_port[port];
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if (cdev != dev) { /* The current packet belongs to a different device */
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if ((cdev==NULL) || !netif_running(cdev)) {
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/* discard (update with old skb) */
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skb = skbn = NULL;
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goto rx_skip;
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}
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else {
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netif_rx_schedule(cdev);/* Start polling next device */
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return 1; /* return 1 -> More packets to process */
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}
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}
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skb = adm5120_skb_rxl[adm5120_rxli];
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len = (dma->status & ADM5120_DMA_LEN);
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len >>= ADM5120_DMA_LENSHIFT;
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len -= ETH_FCS;
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priv = netdev_priv(dev);
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if (len <= 0 || len > ADM5120_DMA_RXSIZE ||
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dma->status & ADM5120_DMA_FCSERR) {
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priv->stats.rx_errors++;
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skbn = NULL;
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} else {
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skbn = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
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if (skbn) {
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skb_put(skb, len);
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skb->dev = dev;
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skb->protocol = eth_type_trans(skb, dev);
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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dev->last_rx = jiffies;
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priv->stats.rx_packets++;
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priv->stats.rx_bytes += len;
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skb_reserve(skbn, NET_IP_ALIGN);
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adm5120_skb_rxl[adm5120_rxli] = skbn;
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} else {
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printk(KERN_INFO "%s recycling!\n", dev->name);
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}
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}
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rx_skip:
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adm5120_rx_dma_update(&adm5120_dma_rxl[adm5120_rxli],
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adm5120_skb_rxl[adm5120_rxli],
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(ADM5120_DMA_RXL-1==adm5120_rxli));
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if (ADM5120_DMA_RXL == ++adm5120_rxli)
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adm5120_rxli = 0;
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dma = &adm5120_dma_rxl[adm5120_rxli];
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if (skbn){
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netif_receive_skb(skb);
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dev->quota--;
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(*budget)--;
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quota--;
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}
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} /* while */
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/* If there are still packets to process, return 1 */
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if (quota){
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/* No more packets to process, so disable the polling and reenable the interrupts */
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netif_rx_complete(dev);
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) &
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~(ADM5120_INT_RXL|ADM5120_INT_LFULL));
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return 0;
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}
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return 1;
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}
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static irqreturn_t adm5120_sw_irq(int irq, void *dev_id)
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{
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unsigned long intreg, intmask;
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int port;
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struct net_device *dev;
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intmask = adm5120_get_reg(ADM5120_INT_MASK); /* Remember interrupt mask */
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adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL); /* Disable interrupts */
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intreg = adm5120_get_reg(ADM5120_INT_ST); /* Read interrupt status */
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adm5120_set_reg(ADM5120_INT_ST, intreg); /* Clear interrupt status */
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/* In NAPI operation the interrupts are disabled and the polling mechanism
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* is activated. The interrupts are finally enabled again in the polling routine.
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*/
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if (intreg & (ADM5120_INT_RXL|ADM5120_INT_LFULL)) {
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/* check rx buffer for port number */
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port = adm5120_dma_rxl[adm5120_rxli].status & ADM5120_DMA_PORTID;
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port >>= ADM5120_DMA_PORTSHIFT;
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dev = adm5120_port[port];
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if ((dev==NULL) || !netif_running(dev)) {
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/* discard (update with old skb) */
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adm5120_rx_dma_update(&adm5120_dma_rxl[adm5120_rxli],
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adm5120_skb_rxl[adm5120_rxli],
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(ADM5120_DMA_RXL-1==adm5120_rxli));
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if (ADM5120_DMA_RXL == ++adm5120_rxli)
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adm5120_rxli = 0;
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}
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else {
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netif_rx_schedule(dev);
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intmask |= (ADM5120_INT_RXL|ADM5120_INT_LFULL); /* Disable RX interrupts */
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}
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}
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#ifdef CONFIG_DEBUG
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if (intreg & ~(intmask))
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printk(KERN_INFO "adm5120sw: IRQ 0x%08X unexpected!\n", (unsigned int)(intreg & ~(intmask)));
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#endif
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adm5120_set_reg(ADM5120_INT_MASK, intmask);
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return IRQ_HANDLED;
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}
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static void adm5120_set_vlan(char *matrix)
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{
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unsigned long val;
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int vlan_port, port;
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val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
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adm5120_set_reg(ADM5120_VLAN_GI, val);
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val = matrix[4] + (matrix[5]<<8);
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adm5120_set_reg(ADM5120_VLAN_GII, val);
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/* Now set/update the port vs. device lookup table */
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for (port=0; port<SW_DEVS; port++) {
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for (vlan_port=0; vlan_port<SW_DEVS && !(matrix[vlan_port] & (0x00000001 << port)); vlan_port++);
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if (vlan_port <SW_DEVS)
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adm5120_port[port] = adm5120_devs[vlan_port];
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else
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adm5120_port[port] = NULL;
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}
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}
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static void adm5120_set_bw(char *matrix)
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{
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unsigned long val;
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/* Port 0 to 3 are set using the bandwidth control 0 register */
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val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
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adm5120_set_reg(ADM5120_BW_CTL0, val);
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/* Port 4 and 5 are set using the bandwidth control 1 register */
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val = matrix[4];
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if (matrix[5] == 1)
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adm5120_set_reg(ADM5120_BW_CTL1, val | 0x80000000);
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else
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adm5120_set_reg(ADM5120_BW_CTL1, val & ~0x8000000);
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printk(KERN_DEBUG "D: ctl0 0x%lx, ctl1 0x%lx\n",
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adm5120_get_reg(ADM5120_BW_CTL0),
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adm5120_get_reg(ADM5120_BW_CTL1));
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}
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static int adm5120_sw_open(struct net_device *dev)
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{
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unsigned long val;
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int i;
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netif_start_queue(dev);
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if (!adm5120_if_open++) {
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/* enable interrupts on first open */
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) &
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~(ADM5120_INT_RXL|ADM5120_INT_LFULL));
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}
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/* enable (additional) port */
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val = adm5120_get_reg(ADM5120_PORT_CONF0);
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for (i=0; i<SW_DEVS; i++) {
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if (dev == adm5120_devs[i])
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val &= ~vlan_matrix[i];
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}
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adm5120_set_reg(ADM5120_PORT_CONF0, val);
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return 0;
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}
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static int adm5120_sw_stop(struct net_device *dev)
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{
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unsigned long val;
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int i;
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if (!--adm5120_if_open) {
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adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
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}
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/* disable port if not assigned to other devices */
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val = adm5120_get_reg(ADM5120_PORT_CONF0) | ADM5120_PORTDISALL;
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for (i=0; i<SW_DEVS; i++) {
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if ((dev != adm5120_devs[i]) && netif_running(adm5120_devs[i]))
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val &= ~vlan_matrix[i];
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}
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adm5120_set_reg(ADM5120_PORT_CONF0, val);
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netif_stop_queue(dev);
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return 0;
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}
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static int adm5120_sw_tx(struct sk_buff *skb, struct net_device *dev)
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{
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struct adm5120_dma *dma;
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struct sk_buff **skbl = adm5120_skb_txl;
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struct adm5120_sw *priv = netdev_priv(dev);
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unsigned long data;
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dev->trans_start = jiffies;
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dma = &adm5120_dma_txl[adm5120_txli];
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if (dma->data & ADM5120_DMA_OWN) {
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/* We want to write a packet but the TX queue is still
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* occupied by the DMA. We are faster than the DMA... */
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dev_kfree_skb(skb);
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priv->stats.tx_dropped++;
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return 0;
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}
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data = ADM5120_DMA_ADDR(skb->data) | ADM5120_DMA_OWN;
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if (adm5120_txli == ADM5120_DMA_TXL-1)
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data |= ADM5120_DMA_RINGEND;
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dma->status =
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((skb->len<ETH_ZLEN?ETH_ZLEN:skb->len) << ADM5120_DMA_LENSHIFT) |
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(0x1 << priv->port);
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dma->len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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priv->stats.tx_packets++;
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priv->stats.tx_bytes += skb->len;
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/* free old skbs here instead of tx completion interrupt:
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* will hold some more memory allocated but reduces interrupts */
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if (skbl[adm5120_txli]){
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dev_kfree_skb(skbl[adm5120_txli]);
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}
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skbl[adm5120_txli] = skb;
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dma->data = data; /* Here we enable the buffer for the TX DMA machine */
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adm5120_set_reg(ADM5120_SEND_TRIG, ADM5120_SEND_TRIG_L);
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if (++adm5120_txli == ADM5120_DMA_TXL)
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adm5120_txli = 0;
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return 0;
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}
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static void adm5120_tx_timeout(struct net_device *dev)
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{
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printk(KERN_INFO "%s: TX timeout\n",dev->name);
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}
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static struct net_device_stats *adm5120_sw_stats(struct net_device *dev)
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{
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struct adm5120_sw *priv = netdev_priv(dev);
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int portmask;
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unsigned long adm5120_cpup_conf_reg;
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portmask = vlan_matrix[priv->port] & 0x3f;
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adm5120_cpup_conf_reg = adm5120_get_reg(ADM5120_CPUP_CONF);
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if (dev->flags & IFF_PROMISC)
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adm5120_cpup_conf_reg &= ~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL);
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else
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adm5120_cpup_conf_reg |= (portmask << ADM5120_DISUNSHIFT);
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if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI || dev->mc_count)
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adm5120_cpup_conf_reg &= ~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL);
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else
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adm5120_cpup_conf_reg |= (portmask << ADM5120_DISMCSHIFT);
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/* If there is any port configured to be in promiscuous mode, then the */
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/* Bridge Test Mode has to be activated. This will result in */
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/* transporting also packets learned in another VLAN to be forwarded */
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/* to the CPU. */
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/* The difficult scenario is when we want to build a bridge on the CPU.*/
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/* Assume we have port0 and the CPU port in VLAN0 and port1 and the */
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/* CPU port in VLAN1. Now we build a bridge on the CPU between */
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/* VLAN0 and VLAN1. Both ports of the VLANs are set in promisc mode. */
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/* Now assume a packet with ethernet source address 99 enters port 0 */
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/* It will be forwarded to the CPU because it is unknown. Then the */
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/* bridge in the CPU will send it to VLAN1 and it goes out at port 1. */
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/* When now a packet with ethernet destination address 99 comes in at */
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/* port 1 in VLAN1, then the switch has learned that this address is */
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/* located at port 0 in VLAN0. Therefore the switch will drop */
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/* this packet. In order to avoid this and to send the packet still */
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/* to the CPU, the Bridge Test Mode has to be activated. */
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/* Check if there is any vlan in promisc mode. */
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if (~adm5120_cpup_conf_reg & ADM5120_DISUNALL)
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adm5120_cpup_conf_reg |= ADM5120_BTM; /* Set the BTM */
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else
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adm5120_cpup_conf_reg &= ~ADM5120_BTM; /* Disable the BTM */
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adm5120_set_reg(ADM5120_CPUP_CONF,adm5120_cpup_conf_reg);
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return &((struct adm5120_sw *)netdev_priv(dev))->stats;
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}
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static void adm5120_set_multicast_list(struct net_device *dev)
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{
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struct adm5120_sw *priv = netdev_priv(dev);
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int portmask;
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portmask = vlan_matrix[priv->port] & 0x3f;
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if (dev->flags & IFF_PROMISC)
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) &
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~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL));
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else
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) |
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(portmask << ADM5120_DISUNSHIFT));
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if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI ||
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dev->mc_count)
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) &
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~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL));
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else
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) |
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(portmask << ADM5120_DISMCSHIFT));
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}
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static void adm5120_write_mac(struct net_device *dev)
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{
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struct adm5120_sw *priv = netdev_priv(dev);
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unsigned char *mac = dev->dev_addr;
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adm5120_set_reg(ADM5120_MAC_WT1,
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mac[2] | (mac[3]<<8) | (mac[4]<<16) | (mac[5]<<24));
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adm5120_set_reg(ADM5120_MAC_WT0, (priv->port<<3) |
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(mac[0]<<16) | (mac[1]<<24) | ADM5120_MAC_WRITE | ADM5120_VLAN_EN);
|
|
|
|
while (!(adm5120_get_reg(ADM5120_MAC_WT0) & ADM5120_MAC_WRITE_DONE));
|
|
}
|
|
|
|
static int adm5120_sw_set_mac_address(struct net_device *dev, void *p)
|
|
{
|
|
struct sockaddr *addr = p;
|
|
|
|
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
|
|
adm5120_write_mac(dev);
|
|
return 0;
|
|
}
|
|
|
|
static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
|
{
|
|
int err;
|
|
struct adm5120_sw_info info;
|
|
struct adm5120_sw *priv = netdev_priv(dev);
|
|
|
|
switch(cmd) {
|
|
case SIOCGADMINFO:
|
|
info.magic = 0x5120;
|
|
info.ports = adm5120_nrdevs;
|
|
info.vlan = priv->port;
|
|
err = copy_to_user(rq->ifr_data, &info, sizeof(info));
|
|
if (err)
|
|
return -EFAULT;
|
|
break;
|
|
case SIOCSMATRIX:
|
|
if (!capable(CAP_NET_ADMIN))
|
|
return -EPERM;
|
|
err = copy_from_user(vlan_matrix, rq->ifr_data,
|
|
sizeof(vlan_matrix));
|
|
if (err)
|
|
return -EFAULT;
|
|
adm5120_set_vlan(vlan_matrix);
|
|
break;
|
|
case SIOCGMATRIX:
|
|
err = copy_to_user(rq->ifr_data, vlan_matrix,
|
|
sizeof(vlan_matrix));
|
|
if (err)
|
|
return -EFAULT;
|
|
break;
|
|
case SIOCGETBW:
|
|
err = copy_to_user(rq->ifr_data, bw_matrix, sizeof(bw_matrix));
|
|
if (err)
|
|
return -EFAULT;
|
|
break;
|
|
case SIOCSETBW:
|
|
if (!capable(CAP_NET_ADMIN))
|
|
return -EPERM;
|
|
err = copy_from_user(bw_matrix, rq->ifr_data, sizeof(bw_matrix));
|
|
if (err)
|
|
return -EFAULT;
|
|
adm5120_set_bw(bw_matrix);
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void adm5120_dma_tx_init(struct adm5120_dma *dma, struct sk_buff **skbl,
|
|
int num)
|
|
{
|
|
memset(dma, 0, sizeof(struct adm5120_dma)*num);
|
|
dma[num-1].data |= ADM5120_DMA_RINGEND;
|
|
memset(skbl, 0, sizeof(struct skb*)*num);
|
|
}
|
|
|
|
static void adm5120_dma_rx_init(struct adm5120_dma *dma, struct sk_buff **skbl,
|
|
int num)
|
|
{
|
|
int i;
|
|
|
|
memset(dma, 0, sizeof(struct adm5120_dma)*num);
|
|
for (i=0; i<num; i++) {
|
|
skbl[i] = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
|
|
if (!skbl[i]) {
|
|
i=num;
|
|
break;
|
|
}
|
|
skb_reserve(skbl[i], NET_IP_ALIGN);
|
|
adm5120_rx_dma_update(&dma[i], skbl[i], (num-1==i));
|
|
}
|
|
}
|
|
|
|
static int __init adm5120_sw_init(void)
|
|
{
|
|
int i, err;
|
|
struct net_device *dev;
|
|
|
|
err = request_irq(ADM5120_IRQ_SWITCH, adm5120_sw_irq, 0, "ethernet switch", NULL);
|
|
if (err)
|
|
goto out;
|
|
|
|
adm5120_nrdevs = adm5120_eth_num_ports;
|
|
|
|
adm5120_set_reg(ADM5120_CPUP_CONF,
|
|
ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING |
|
|
ADM5120_DISUNALL | ADM5120_DISMCALL);
|
|
adm5120_set_reg(ADM5120_PORT_CONF0, ADM5120_ENMC | ADM5120_ENBP | ADM5120_PORTDISALL);
|
|
|
|
adm5120_set_reg(ADM5120_PHY_CNTL2, adm5120_get_reg(ADM5120_PHY_CNTL2) |
|
|
ADM5120_AUTONEG | ADM5120_NORMAL | ADM5120_AUTOMDIX);
|
|
adm5120_set_reg(ADM5120_PHY_CNTL3, adm5120_get_reg(ADM5120_PHY_CNTL3) |
|
|
ADM5120_PHY_NTH);
|
|
|
|
adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
|
|
adm5120_set_reg(ADM5120_INT_ST, ADM5120_INTMASKALL);
|
|
|
|
adm5120_dma_txh = (void *)KSEG1ADDR((u32)adm5120_dma_txh_v);
|
|
adm5120_dma_txl = (void *)KSEG1ADDR((u32)adm5120_dma_txl_v);
|
|
adm5120_dma_rxh = (void *)KSEG1ADDR((u32)adm5120_dma_rxh_v);
|
|
adm5120_dma_rxl = (void *)KSEG1ADDR((u32)adm5120_dma_rxl_v);
|
|
|
|
adm5120_dma_tx_init(adm5120_dma_txh, adm5120_skb_txh, ADM5120_DMA_TXH);
|
|
adm5120_dma_tx_init(adm5120_dma_txl, adm5120_skb_txl, ADM5120_DMA_TXL);
|
|
adm5120_dma_rx_init(adm5120_dma_rxh, adm5120_skb_rxh, ADM5120_DMA_RXH);
|
|
adm5120_dma_rx_init(adm5120_dma_rxl, adm5120_skb_rxl, ADM5120_DMA_RXL);
|
|
adm5120_set_reg(ADM5120_SEND_HBADDR, KSEG1ADDR(adm5120_dma_txh));
|
|
adm5120_set_reg(ADM5120_SEND_LBADDR, KSEG1ADDR(adm5120_dma_txl));
|
|
adm5120_set_reg(ADM5120_RECEIVE_HBADDR, KSEG1ADDR(adm5120_dma_rxh));
|
|
adm5120_set_reg(ADM5120_RECEIVE_LBADDR, KSEG1ADDR(adm5120_dma_rxl));
|
|
|
|
for (i=0; i<adm5120_nrdevs; i++) {
|
|
adm5120_devs[i] = alloc_etherdev(sizeof(struct adm5120_sw));
|
|
if (!adm5120_devs[i]) {
|
|
err = -ENOMEM;
|
|
goto out_int;
|
|
}
|
|
|
|
dev = adm5120_devs[i];
|
|
SET_MODULE_OWNER(dev);
|
|
memset(netdev_priv(dev), 0, sizeof(struct adm5120_sw));
|
|
((struct adm5120_sw*)netdev_priv(dev))->port = i;
|
|
dev->base_addr = SW_BASE;
|
|
dev->irq = ADM5120_IRQ_SWITCH;
|
|
dev->open = adm5120_sw_open;
|
|
dev->hard_start_xmit = adm5120_sw_tx;
|
|
dev->stop = adm5120_sw_stop;
|
|
dev->get_stats = adm5120_sw_stats;
|
|
dev->set_multicast_list = adm5120_set_multicast_list;
|
|
dev->do_ioctl = adm5120_do_ioctl;
|
|
dev->tx_timeout = adm5120_tx_timeout;
|
|
dev->watchdog_timeo = ETH_TX_TIMEOUT;
|
|
dev->set_mac_address = adm5120_sw_set_mac_address;
|
|
dev->poll = adm5120_rx;
|
|
dev->weight = 64;
|
|
|
|
memcpy(dev->dev_addr, adm5120_eth_macs[i], 6);
|
|
adm5120_write_mac(dev);
|
|
|
|
if ((err = register_netdev(dev))) {
|
|
free_netdev(dev);
|
|
goto out_int;
|
|
}
|
|
printk(KERN_INFO "%s: ADM5120 switch port%d\n", dev->name, i);
|
|
}
|
|
/* setup vlan/port mapping after devs are filled up */
|
|
adm5120_set_vlan(vlan_matrix);
|
|
|
|
adm5120_set_reg(ADM5120_CPUP_CONF,
|
|
ADM5120_CRC_PADDING | ADM5120_DISUNALL | ADM5120_DISMCALL);
|
|
|
|
return 0;
|
|
|
|
out_int:
|
|
/* Undo everything that did succeed */
|
|
for (; i; i--) {
|
|
unregister_netdev(adm5120_devs[i-1]);
|
|
free_netdev(adm5120_devs[i-1]);
|
|
}
|
|
free_irq(ADM5120_IRQ_SWITCH, NULL);
|
|
out:
|
|
printk(KERN_ERR "ADM5120 Ethernet switch init failed\n");
|
|
return err;
|
|
}
|
|
|
|
static void __exit adm5120_sw_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < adm5120_nrdevs; i++) {
|
|
unregister_netdev(adm5120_devs[i]);
|
|
free_netdev(adm5120_devs[i-1]);
|
|
}
|
|
|
|
free_irq(ADM5120_IRQ_SWITCH, NULL);
|
|
|
|
for (i = 0; i < ADM5120_DMA_RXH; i++) {
|
|
if (!adm5120_skb_rxh[i])
|
|
break;
|
|
kfree_skb(adm5120_skb_rxh[i]);
|
|
}
|
|
for (i = 0; i < ADM5120_DMA_RXL; i++) {
|
|
if (!adm5120_skb_rxl[i])
|
|
break;
|
|
kfree_skb(adm5120_skb_rxl[i]);
|
|
}
|
|
}
|
|
|
|
module_init(adm5120_sw_init);
|
|
module_exit(adm5120_sw_exit);
|