e8068f0b1b
Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 43457
86 lines
1.6 KiB
Text
86 lines
1.6 KiB
Text
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "brcm,bcm6368";
|
|
|
|
aliases {
|
|
pflash = &pflash;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
cpu_intc: interrupt-controller {
|
|
#address-cells = <0>;
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
memory { device_type = "memory"; reg = <0 0>; };
|
|
|
|
ubus@10000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
compatible = "simple-bus";
|
|
|
|
ext_intc0: interrupt-controller@10000018 {
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
reg = <0x10000018 0x4>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <20>, <21>, <22>, <23>;
|
|
};
|
|
|
|
ext_intc1: interrupt-controller@1000001c {
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
reg = <0x1000001c 0x4>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <24>, <25>;
|
|
};
|
|
|
|
periph_intc: interrupt-controller@10000020 {
|
|
compatible = "brcm,bcm6345-l2-intc";
|
|
reg = <0x10000020 0x10>,
|
|
<0x10000030 0x10>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&cpu_intc>;
|
|
interrupts = <2>, <3>;
|
|
};
|
|
};
|
|
|
|
pflash: nor@18000000 {
|
|
compatible = "cfi-flash";
|
|
reg = <0x18000000 0x2000000>;
|
|
bank-width = <2>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
};
|