69d323f231
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.10, and Linux v3.11. This work mainly covers: * Enabling USB storage, and PCI to mvebu_defconfig. * Add support for NOR flash. * Some PCI device tree related updates, and bus parsing. * Adding Armada XP & 370 PCI driver, and update some clock gating specifics. * Introduce Marvell EBU Device Bus driver. * Enaling USB in the armada*.dts. * Enabling, and updating the mvebu-mbus. * Some SATA and Ethernet related fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39564
71 lines
2.1 KiB
Diff
71 lines
2.1 KiB
Diff
From 74cd8c09ae416261d7595021fc8062836dc750a2 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Fri, 17 May 2013 08:09:58 -0300
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Subject: [PATCH 003/203] ARM: mvebu: Add support for NOR flash device on
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Armada XP-DB board
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The Armada XP Development Board (DB-78460-BP) has a NOR flash device
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connected to the Device Bus. This commit adds the device tree node
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to support this device.
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This SoC supports a flexible and dynamic decoding window allocation
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scheme; but since this feature is still not implemented we need
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to specify the window base address in the device tree node itself.
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This base address has been selected in a completely arbitrary fashion.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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---
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arch/arm/boot/dts/armada-xp-db.dts | 32 ++++++++++++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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--- a/arch/arm/boot/dts/armada-xp-db.dts
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+++ b/arch/arm/boot/dts/armada-xp-db.dts
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@@ -30,6 +30,9 @@
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};
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soc {
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+ ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
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+ 0xf0000000 0 0xf0000000 0x1000000>; /* Device Bus, NOR 16MiB */
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+
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internal-regs {
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serial@12000 {
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clock-frequency = <250000000>;
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@@ -156,6 +159,35 @@
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status = "okay";
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};
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};
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+
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+ devbus-bootcs@10400 {
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+ status = "okay";
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+ ranges = <0 0xf0000000 0x1000000>;
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+
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+ /* Device Bus parameters are required */
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+
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+ /* Read parameters */
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+ devbus,bus-width = <8>;
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+ devbus,turn-off-ps = <60000>;
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+ devbus,badr-skew-ps = <0>;
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+ devbus,acc-first-ps = <124000>;
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+ devbus,acc-next-ps = <248000>;
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+ devbus,rd-setup-ps = <0>;
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+ devbus,rd-hold-ps = <0>;
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+
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+ /* Write parameters */
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+ devbus,sync-enable = <0>;
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+ devbus,wr-high-ps = <60000>;
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+ devbus,wr-low-ps = <60000>;
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+ devbus,ale-wr-ps = <60000>;
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+
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+ /* NOR 16 MiB */
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+ nor@0 {
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+ compatible = "cfi-flash";
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+ reg = <0 0x1000000>;
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+ bank-width = <2>;
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+ };
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+ };
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};
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};
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};
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