0605b15be4
Add upstream send AR724x PCIe patches to get the PCIe controller out of reset during driver init. The AVM Fritz 300E bootloader doesn't take care of releasing the different PCIe controller related resets which causes an endless hang as soon as either the PCIE Reset register (0x180f0018) or the PCI Application Control register (0x180f0000) is read from. Signed-off-by: Mathias Kresin <dev@kresin.me>
67 lines
2 KiB
Diff
67 lines
2 KiB
Diff
Add access to the function2 gpio register. This probably has to be
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converted into a pimux driver later on. This is needed for some setup
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functions on the Arduino Yun.
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--- a/arch/mips/ath79/common.h
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+++ b/arch/mips/ath79/common.h
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@@ -30,6 +30,7 @@ void ath79_ddr_wb_flush(unsigned int reg
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void ath79_gpio_function_enable(u32 mask);
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void ath79_gpio_function_disable(u32 mask);
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void ath79_gpio_function_setup(u32 set, u32 clear);
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+void ath79_gpio_function2_setup(u32 set, u32 clear);
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void ath79_gpio_output_select(unsigned gpio, u8 val);
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int ath79_gpio_direction_select(unsigned gpio, bool oe);
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void ath79_gpio_init(void);
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -43,6 +43,31 @@ static void __iomem *ath79_gpio_get_func
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return ath79_gpio_base + reg;
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}
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+static void __iomem *ath79_gpio_get_function2_reg(void)
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+{
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+ u32 reg = 0;
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+
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+ if (soc_is_ar71xx() ||
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+ soc_is_ar724x() ||
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+ soc_is_ar913x() ||
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+ soc_is_ar933x())
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+ reg = AR71XX_GPIO_REG_FUNC_2;
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+ else
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+ BUG();
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+
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+ return ath79_gpio_base + reg;
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+}
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+
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+
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+void ath79_gpio_function2_setup(u32 set, u32 clear)
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+{
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+ void __iomem *reg = ath79_gpio_get_function2_reg();
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+
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+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
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+ /* flush write */
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+ __raw_readl(reg);
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+}
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+
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void ath79_gpio_function_setup(u32 set, u32 clear)
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{
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void __iomem *reg = ath79_gpio_get_function_reg();
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -865,6 +865,7 @@
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#define AR71XX_GPIO_REG_INT_PENDING 0x20
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#define AR71XX_GPIO_REG_INT_ENABLE 0x24
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#define AR71XX_GPIO_REG_FUNC 0x28
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+#define AR71XX_GPIO_REG_FUNC_2 0x30
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#define AR934X_GPIO_REG_OUT_FUNC0 0x2c
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#define AR934X_GPIO_REG_OUT_FUNC1 0x30
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@@ -989,6 +990,8 @@
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#define AR724X_GPIO_FUNC_UART_EN BIT(1)
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#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
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+#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9)
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+
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#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22)
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#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
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#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20)
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