72b58f2eb1
This is the oxnas target previously developed at http://gitorious.org/openwrt-oxnas Basically, this consolidates the changes and addtionas from http://github.org/kref/linux-oxnas into a new OpenWrt hardware target 'oxnas' adding support for PLX Technology NAS7820/NAS7821/NAS7825/... formally known as Oxford Semiconductor OXE810SE/OXE815/OX820/... For now there are 4 supported boards: Cloud Engines Pogoplug V3 (without PCIe) fully supported Cloud Engines Pogoplug Pro (with PCIe) fully supported MitraStar STG-212 aka ZyXEL NSA-212, aka Medion Akoya P89625 / P89636 / P89626 / P89630, aka Medion MD 86407 / MD 86805 / MD 86517 / MD 86587 fully supported, see http://wiki.openwrt.org/toh/medion/md86587 Shuttle KD-20 partially supported (S-ATA driver lacks support for 2nd port) Signed-off-by: Daniel Golle <daniel@makrotopia.org> SVN-Revision: 43388
112 lines
2.3 KiB
C
112 lines
2.3 KiB
C
/*
|
|
* linux/arch/arm/mach-realview/hotplug.c
|
|
*
|
|
* Copyright (C) 2002 ARM Ltd.
|
|
* All Rights Reserved
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/kernel.h>
|
|
#include <linux/errno.h>
|
|
#include <linux/smp.h>
|
|
|
|
#include <asm/cp15.h>
|
|
#include <asm/smp_plat.h>
|
|
#include <mach/smp.h>
|
|
|
|
static inline void cpu_enter_lowpower(void)
|
|
{
|
|
unsigned int v;
|
|
|
|
asm volatile(
|
|
" mcr p15, 0, %1, c7, c5, 0\n"
|
|
" mcr p15, 0, %1, c7, c10, 4\n"
|
|
/*
|
|
* Turn off coherency
|
|
*/
|
|
" mrc p15, 0, %0, c1, c0, 1\n"
|
|
" bic %0, %0, #0x20\n"
|
|
" mcr p15, 0, %0, c1, c0, 1\n"
|
|
" mrc p15, 0, %0, c1, c0, 0\n"
|
|
" bic %0, %0, %2\n"
|
|
" mcr p15, 0, %0, c1, c0, 0\n"
|
|
: "=&r" (v)
|
|
: "r" (0), "Ir" (CR_C)
|
|
: "cc");
|
|
}
|
|
|
|
static inline void cpu_leave_lowpower(void)
|
|
{
|
|
unsigned int v;
|
|
|
|
asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
|
|
" orr %0, %0, %1\n"
|
|
" mcr p15, 0, %0, c1, c0, 0\n"
|
|
" mrc p15, 0, %0, c1, c0, 1\n"
|
|
" orr %0, %0, #0x20\n"
|
|
" mcr p15, 0, %0, c1, c0, 1\n"
|
|
: "=&r" (v)
|
|
: "Ir" (CR_C)
|
|
: "cc");
|
|
}
|
|
|
|
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
|
{
|
|
/*
|
|
* there is no power-control hardware on this platform, so all
|
|
* we can do is put the core into WFI; this is safe as the calling
|
|
* code will have already disabled interrupts
|
|
*/
|
|
for (;;) {
|
|
/*
|
|
* here's the WFI
|
|
*/
|
|
asm(".word 0xe320f003\n"
|
|
:
|
|
:
|
|
: "memory", "cc");
|
|
|
|
if (read_pen_release() == cpu_logical_map(cpu)) {
|
|
/*
|
|
* OK, proper wakeup, we're done
|
|
*/
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Getting here, means that we have come out of WFI without
|
|
* having been woken up - this shouldn't happen
|
|
*
|
|
* Just note it happening - when we're woken, we can report
|
|
* its occurrence.
|
|
*/
|
|
(*spurious)++;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* platform-specific code to shutdown a CPU
|
|
*
|
|
* Called with IRQs disabled
|
|
*/
|
|
void __ref ox820_cpu_die(unsigned int cpu)
|
|
{
|
|
int spurious = 0;
|
|
|
|
/*
|
|
* we're ready for shutdown now, so do it
|
|
*/
|
|
cpu_enter_lowpower();
|
|
platform_do_lowpower(cpu, &spurious);
|
|
|
|
/*
|
|
* bring this CPU back into the world of cache
|
|
* coherency, and then restore interrupts
|
|
*/
|
|
cpu_leave_lowpower();
|
|
|
|
if (spurious)
|
|
pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
|
|
}
|