67 lines
1.8 KiB
Diff
67 lines
1.8 KiB
Diff
From a02b2ef06a3f11d2e6c20c2cdcdd6f0b4217d234 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Sat, 22 Feb 2014 22:35:57 +0100
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Subject: [PATCH] ARM: dt: sun5i: Add A13 SPI controller nodes
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The A13 has 3 SPI controllers compatible with the one found in the A10. Add
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them in the DT.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun5i-a13.dtsi | 33 +++++++++++++++++++++++++++++++++
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1 file changed, 33 insertions(+)
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diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
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index b0cc56c..1ff406b 100644
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--- a/arch/arm/boot/dts/sun5i-a13.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
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@@ -290,6 +290,28 @@
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#size-cells = <1>;
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ranges;
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+ spi0: spi@01c05000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c05000 0x1000>;
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+ interrupts = <10>;
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+ clocks = <&ahb_gates 20>, <&spi0_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ spi1: spi@01c06000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c06000 0x1000>;
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+ interrupts = <11>;
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+ clocks = <&ahb_gates 21>, <&spi1_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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mmc0: mmc@01c0f000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c0f000 0x1000>;
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@@ -344,6 +366,17 @@
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status = "disabled";
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};
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+ spi2: spi@01c17000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c17000 0x1000>;
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+ interrupts = <12>;
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+ clocks = <&ahb_gates 22>, <&spi2_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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intc: interrupt-controller@01c20400 {
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compatible = "allwinner,sun4i-ic";
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reg = <0x01c20400 0x400>;
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--
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1.8.5.5
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