bdd0df792a
SVN-Revision: 14023
83 lines
2.7 KiB
Diff
83 lines
2.7 KiB
Diff
From 480e7cbba032b1710768ffa1f067f34f99016a73 Mon Sep 17 00:00:00 2001
|
|
From: Gabor Juhos <juhosg@openwrt.org>
|
|
Date: Mon, 5 Jan 2009 11:11:28 +0100
|
|
Subject: [PATCH v3 08/11] ath9k: remove (u16) casts from rtc register access
|
|
|
|
The RTC register offsets don't fit into 'u16' on the AR913x, so we have
|
|
to remove the existing casts.
|
|
|
|
Changes-licensed-under: ISC
|
|
|
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
|
---
|
|
drivers/net/wireless/ath9k/hw.c | 14 +++++++-------
|
|
drivers/net/wireless/ath9k/reg.h | 4 ++--
|
|
2 files changed, 9 insertions(+), 9 deletions(-)
|
|
|
|
--- a/drivers/net/wireless/ath9k/hw.c
|
|
+++ b/drivers/net/wireless/ath9k/hw.c
|
|
@@ -1008,7 +1008,7 @@ static void ath9k_hw_init_pll(struct ath
|
|
pll |= SM(0xb, AR_RTC_PLL_DIV);
|
|
}
|
|
}
|
|
- REG_WRITE(ah, (u16) (AR_RTC_PLL_CONTROL), pll);
|
|
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
|
|
|
|
udelay(RTC_PLL_SETTLE_DELAY);
|
|
|
|
@@ -1547,11 +1547,11 @@ static bool ath9k_hw_set_reset(struct at
|
|
rst_flags |= AR_RTC_RC_MAC_COLD;
|
|
}
|
|
|
|
- REG_WRITE(ah, (u16) (AR_RTC_RC), rst_flags);
|
|
+ REG_WRITE(ah, AR_RTC_RC, rst_flags);
|
|
udelay(50);
|
|
|
|
- REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
|
|
- if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
|
|
+ REG_WRITE(ah, AR_RTC_RC, 0);
|
|
+ if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0)) {
|
|
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
|
"RTC stuck in MAC reset\n");
|
|
return false;
|
|
@@ -1573,8 +1573,8 @@ static bool ath9k_hw_set_reset_power_on(
|
|
REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
|
|
AR_RTC_FORCE_WAKE_ON_INT);
|
|
|
|
- REG_WRITE(ah, (u16) (AR_RTC_RESET), 0);
|
|
- REG_WRITE(ah, (u16) (AR_RTC_RESET), 1);
|
|
+ REG_WRITE(ah, AR_RTC_RESET, 0);
|
|
+ REG_WRITE(ah, AR_RTC_RESET, 1);
|
|
|
|
if (!ath9k_hw_wait(ah,
|
|
AR_RTC_STATUS,
|
|
@@ -2616,7 +2616,7 @@ static void ath9k_set_power_sleep(struct
|
|
if (!AR_SREV_9100(ah))
|
|
REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
|
|
|
|
- REG_CLR_BIT(ah, (u16) (AR_RTC_RESET),
|
|
+ REG_CLR_BIT(ah, (AR_RTC_RESET),
|
|
AR_RTC_RESET_EN);
|
|
}
|
|
}
|
|
--- a/drivers/net/wireless/ath9k/reg.h
|
|
+++ b/drivers/net/wireless/ath9k/reg.h
|
|
@@ -953,7 +953,7 @@ enum {
|
|
|
|
#define AR_RTC_BASE 0x00020000
|
|
#define AR_RTC_RC \
|
|
- (AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000
|
|
+ ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000)
|
|
#define AR_RTC_RC_M 0x00000003
|
|
#define AR_RTC_RC_MAC_WARM 0x00000001
|
|
#define AR_RTC_RC_MAC_COLD 0x00000002
|
|
@@ -961,7 +961,7 @@ enum {
|
|
#define AR_RTC_RC_WARM_RESET 0x00000008
|
|
|
|
#define AR_RTC_PLL_CONTROL \
|
|
- (AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014
|
|
+ ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014)
|
|
|
|
#define AR_RTC_PLL_DIV 0x0000001f
|
|
#define AR_RTC_PLL_DIV_S 0
|