22b3e521b5
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 46640
615 lines
17 KiB
Diff
615 lines
17 KiB
Diff
From 0dcdc1b4040137f2e273f85355f8bcc431a83ca6 Mon Sep 17 00:00:00 2001
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From: popcornmix <popcornmix@gmail.com>
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Date: Wed, 8 Oct 2014 18:50:05 +0100
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Subject: [PATCH 002/148] Add bcm2708_gpio driver
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Signed-off-by: popcornmix <popcornmix@gmail.com>
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bcm2708: Add extension to configure internal pulls
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The bcm2708 gpio controller supports internal pulls to be used as pull-up,
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pull-down or being entirely disabled. As it can be useful for a driver to
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change the pull configuration from it's default pull-down state, add an
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extension which allows configuring the pull per gpio.
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Signed-off-by: Julian Scheel <julian@jusst.de>
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bcm2708-gpio: Revert the use of pinctrl_request_gpio
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In non-DT systems, pinctrl_request_gpio always fails causing
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"requests probe deferral" messages. In DT systems, it isn't useful
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because the reference counting is independent of the normal pinctrl
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pin reservations.
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gpio: Only clear the currently occurring interrupt. Avoids losing interrupts
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See: linux #760
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bcm2708_gpio: Avoid calling irq_unmask for all interrupts
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When setting up the interrupts, specify that the handle_simple_irq
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handler should be used. This leaves interrupt acknowledgement to
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the caller, and prevents irq_unmask from being called for all
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interrupts.
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Issue: linux #760
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---
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arch/arm/mach-bcm2708/Kconfig | 8 +
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arch/arm/mach-bcm2708/Makefile | 1 +
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arch/arm/mach-bcm2708/bcm2708.c | 25 ++
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arch/arm/mach-bcm2708/bcm2708_gpio.c | 426 ++++++++++++++++++++++++++++++
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arch/arm/mach-bcm2708/include/mach/gpio.h | 17 ++
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arch/arm/mach-bcm2709/bcm2709.c | 25 ++
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include/linux/platform_data/bcm2708.h | 23 ++
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7 files changed, 525 insertions(+)
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create mode 100644 arch/arm/mach-bcm2708/bcm2708_gpio.c
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create mode 100644 arch/arm/mach-bcm2708/include/mach/gpio.h
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create mode 100644 include/linux/platform_data/bcm2708.h
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--- a/arch/arm/mach-bcm2708/Kconfig
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+++ b/arch/arm/mach-bcm2708/Kconfig
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@@ -20,6 +20,14 @@ config BCM2708_DT
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help
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Enable Device Tree support for BCM2708
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+config BCM2708_GPIO
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+ bool "BCM2708 gpio support"
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+ depends on MACH_BCM2708
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+ select ARCH_REQUIRE_GPIOLIB
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+ default y
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+ help
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+ Include support for the Broadcom(R) BCM2708 gpio.
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+
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config BCM2708_NOL2CACHE
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bool "Videocore L2 cache disable"
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depends on MACH_BCM2708
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--- a/arch/arm/mach-bcm2708/Makefile
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+++ b/arch/arm/mach-bcm2708/Makefile
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@@ -3,3 +3,4 @@
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#
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obj-$(CONFIG_MACH_BCM2708) += bcm2708.o armctrl.o
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+obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o
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--- a/arch/arm/mach-bcm2708/bcm2708.c
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+++ b/arch/arm/mach-bcm2708/bcm2708.c
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@@ -298,6 +298,31 @@ static struct platform_device bcm2708_vc
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},
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};
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+#ifdef CONFIG_BCM2708_GPIO
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+#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
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+
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+static struct resource bcm2708_gpio_resources[] = {
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+ [0] = { /* general purpose I/O */
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+ .start = GPIO_BASE,
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+ .end = GPIO_BASE + SZ_4K - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
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+
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+static struct platform_device bcm2708_gpio_device = {
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+ .name = BCM_GPIO_DRIVER_NAME,
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+ .id = -1, /* only one VideoCore I/O area */
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+ .resource = bcm2708_gpio_resources,
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+ .num_resources = ARRAY_SIZE(bcm2708_gpio_resources),
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+ .dev = {
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+ .dma_mask = &gpio_dmamask,
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+ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
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+ },
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+};
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+#endif
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+
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int __init bcm_register_device(struct platform_device *pdev)
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{
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int ret;
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--- /dev/null
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+++ b/arch/arm/mach-bcm2708/bcm2708_gpio.c
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@@ -0,0 +1,426 @@
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+/*
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+ * linux/arch/arm/mach-bcm2708/bcm2708_gpio.c
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+ *
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+ * Copyright (C) 2010 Broadcom
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ */
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+
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+#include <linux/spinlock.h>
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+#include <linux/module.h>
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+#include <linux/delay.h>
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+#include <linux/list.h>
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+#include <linux/io.h>
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+#include <linux/irq.h>
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+#include <linux/interrupt.h>
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+#include <linux/slab.h>
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+#include <mach/gpio.h>
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+#include <linux/gpio.h>
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+#include <linux/platform_device.h>
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+#include <mach/platform.h>
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+#include <linux/pinctrl/consumer.h>
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+
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+#include <linux/platform_data/bcm2708.h>
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+
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+#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
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+#define DRIVER_NAME BCM_GPIO_DRIVER_NAME
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+#define BCM_GPIO_USE_IRQ 1
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+
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+#define GPIOFSEL(x) (0x00+(x)*4)
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+#define GPIOSET(x) (0x1c+(x)*4)
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+#define GPIOCLR(x) (0x28+(x)*4)
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+#define GPIOLEV(x) (0x34+(x)*4)
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+#define GPIOEDS(x) (0x40+(x)*4)
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+#define GPIOREN(x) (0x4c+(x)*4)
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+#define GPIOFEN(x) (0x58+(x)*4)
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+#define GPIOHEN(x) (0x64+(x)*4)
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+#define GPIOLEN(x) (0x70+(x)*4)
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+#define GPIOAREN(x) (0x7c+(x)*4)
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+#define GPIOAFEN(x) (0x88+(x)*4)
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+#define GPIOUD(x) (0x94+(x)*4)
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+#define GPIOUDCLK(x) (0x98+(x)*4)
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+
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+#define GPIO_BANKS 2
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+
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+enum { GPIO_FSEL_INPUT, GPIO_FSEL_OUTPUT,
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+ GPIO_FSEL_ALT5, GPIO_FSEL_ALT_4,
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+ GPIO_FSEL_ALT0, GPIO_FSEL_ALT1,
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+ GPIO_FSEL_ALT2, GPIO_FSEL_ALT3,
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+};
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+
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+ /* Each of the two spinlocks protects a different set of hardware
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+ * regiters and data structurs. This decouples the code of the IRQ from
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+ * the GPIO code. This also makes the case of a GPIO routine call from
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+ * the IRQ code simpler.
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+ */
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+static DEFINE_SPINLOCK(lock); /* GPIO registers */
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+
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+struct bcm2708_gpio {
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+ struct list_head list;
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+ void __iomem *base;
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+ struct gpio_chip gc;
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+ unsigned long rising[(BCM2708_NR_GPIOS + 31) / 32];
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+ unsigned long falling[(BCM2708_NR_GPIOS + 31) / 32];
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+ unsigned long high[(BCM2708_NR_GPIOS + 31) / 32];
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+ unsigned long low[(BCM2708_NR_GPIOS + 31) / 32];
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+};
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+
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+static int bcm2708_set_function(struct gpio_chip *gc, unsigned offset,
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+ int function)
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+{
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+ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
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+ unsigned long flags;
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+ unsigned gpiodir;
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+ unsigned gpio_bank = offset / 10;
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+ unsigned gpio_field_offset = (offset - 10 * gpio_bank) * 3;
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+
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+//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set_function %p (%d,%d)\n", gc, offset, function);
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+ if (offset >= BCM2708_NR_GPIOS)
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+ return -EINVAL;
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+
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+ spin_lock_irqsave(&lock, flags);
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+
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+ gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank));
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+ gpiodir &= ~(7 << gpio_field_offset);
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+ gpiodir |= function << gpio_field_offset;
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+ writel(gpiodir, gpio->base + GPIOFSEL(gpio_bank));
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+ spin_unlock_irqrestore(&lock, flags);
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+ gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank));
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+
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+ return 0;
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+}
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+
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+static int bcm2708_gpio_dir_in(struct gpio_chip *gc, unsigned offset)
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+{
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+ return bcm2708_set_function(gc, offset, GPIO_FSEL_INPUT);
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+}
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+
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+static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value);
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+static int bcm2708_gpio_dir_out(struct gpio_chip *gc, unsigned offset,
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+ int value)
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+{
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+ int ret;
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+ ret = bcm2708_set_function(gc, offset, GPIO_FSEL_OUTPUT);
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+ if (ret >= 0)
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+ bcm2708_gpio_set(gc, offset, value);
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+ return ret;
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+}
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+
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+static int bcm2708_gpio_get(struct gpio_chip *gc, unsigned offset)
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+{
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+ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
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+ unsigned gpio_bank = offset / 32;
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+ unsigned gpio_field_offset = (offset - 32 * gpio_bank);
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+ unsigned lev;
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+
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+ if (offset >= BCM2708_NR_GPIOS)
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+ return 0;
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+ lev = readl(gpio->base + GPIOLEV(gpio_bank));
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+//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_get %p (%d)=%d\n", gc, offset, 0x1 & (lev>>gpio_field_offset));
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+ return 0x1 & (lev >> gpio_field_offset);
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+}
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+
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+static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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+{
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+ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
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+ unsigned gpio_bank = offset / 32;
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+ unsigned gpio_field_offset = (offset - 32 * gpio_bank);
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+//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set %p (%d=%d)\n", gc, offset, value);
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+ if (offset >= BCM2708_NR_GPIOS)
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+ return;
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+ if (value)
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+ writel(1 << gpio_field_offset, gpio->base + GPIOSET(gpio_bank));
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+ else
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+ writel(1 << gpio_field_offset, gpio->base + GPIOCLR(gpio_bank));
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+}
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+
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+/**********************
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+ * extension to configure pullups
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+ */
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+int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset,
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+ bcm2708_gpio_pull_t value)
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+{
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+ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
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+ unsigned gpio_bank = offset / 32;
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+ unsigned gpio_field_offset = (offset - 32 * gpio_bank);
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+
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+ if (offset >= BCM2708_NR_GPIOS)
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+ return -EINVAL;
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+
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+ switch (value) {
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+ case BCM2708_PULL_UP:
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+ writel(2, gpio->base + GPIOUD(0));
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+ break;
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+ case BCM2708_PULL_DOWN:
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+ writel(1, gpio->base + GPIOUD(0));
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+ break;
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+ case BCM2708_PULL_OFF:
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+ writel(0, gpio->base + GPIOUD(0));
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+ break;
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+ }
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+
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+ udelay(5);
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+ writel(1 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank));
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+ udelay(5);
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+ writel(0, gpio->base + GPIOUD(0));
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+ writel(0 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank));
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL(bcm2708_gpio_setpull);
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+
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+/*************************************************************************************************************************
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+ * bcm2708 GPIO IRQ
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+ */
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+
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+#if BCM_GPIO_USE_IRQ
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+
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+static int bcm2708_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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+{
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+ return gpio_to_irq(gpio);
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+}
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+
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+static int bcm2708_gpio_irq_set_type(struct irq_data *d, unsigned type)
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+{
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+ unsigned irq = d->irq;
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+ struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
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+ unsigned gn = irq_to_gpio(irq);
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+ unsigned gb = gn / 32;
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+ unsigned go = gn % 32;
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+
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+ gpio->rising[gb] &= ~(1 << go);
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+ gpio->falling[gb] &= ~(1 << go);
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+ gpio->high[gb] &= ~(1 << go);
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+ gpio->low[gb] &= ~(1 << go);
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+
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+ if (type & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
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+ return -EINVAL;
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+
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+ if (type & IRQ_TYPE_EDGE_RISING)
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+ gpio->rising[gb] |= (1 << go);
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+ if (type & IRQ_TYPE_EDGE_FALLING)
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+ gpio->falling[gb] |= (1 << go);
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+ if (type & IRQ_TYPE_LEVEL_HIGH)
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+ gpio->high[gb] |= (1 << go);
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+ if (type & IRQ_TYPE_LEVEL_LOW)
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+ gpio->low[gb] |= (1 << go);
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+ return 0;
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+}
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+
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+static void bcm2708_gpio_irq_mask(struct irq_data *d)
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+{
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+ unsigned irq = d->irq;
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+ struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
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+ unsigned gn = irq_to_gpio(irq);
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+ unsigned gb = gn / 32;
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+ unsigned long rising = readl(gpio->base + GPIOREN(gb));
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+ unsigned long falling = readl(gpio->base + GPIOFEN(gb));
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+ unsigned long high = readl(gpio->base + GPIOHEN(gb));
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+ unsigned long low = readl(gpio->base + GPIOLEN(gb));
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+
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+ gn = gn % 32;
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+
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+ writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb));
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+ writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb));
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+ writel(high & ~(1 << gn), gpio->base + GPIOHEN(gb));
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+ writel(low & ~(1 << gn), gpio->base + GPIOLEN(gb));
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+}
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+
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+static void bcm2708_gpio_irq_unmask(struct irq_data *d)
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+{
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+ unsigned irq = d->irq;
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+ struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
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+ unsigned gn = irq_to_gpio(irq);
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+ unsigned gb = gn / 32;
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+ unsigned go = gn % 32;
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+ unsigned long rising = readl(gpio->base + GPIOREN(gb));
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+ unsigned long falling = readl(gpio->base + GPIOFEN(gb));
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+ unsigned long high = readl(gpio->base + GPIOHEN(gb));
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+ unsigned long low = readl(gpio->base + GPIOLEN(gb));
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+
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+ if (gpio->rising[gb] & (1 << go)) {
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+ writel(rising | (1 << go), gpio->base + GPIOREN(gb));
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+ } else {
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+ writel(rising & ~(1 << go), gpio->base + GPIOREN(gb));
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+ }
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+
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+ if (gpio->falling[gb] & (1 << go)) {
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+ writel(falling | (1 << go), gpio->base + GPIOFEN(gb));
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+ } else {
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+ writel(falling & ~(1 << go), gpio->base + GPIOFEN(gb));
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+ }
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+
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+ if (gpio->high[gb] & (1 << go)) {
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+ writel(high | (1 << go), gpio->base + GPIOHEN(gb));
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+ } else {
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+ writel(high & ~(1 << go), gpio->base + GPIOHEN(gb));
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+ }
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+
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+ if (gpio->low[gb] & (1 << go)) {
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+ writel(low | (1 << go), gpio->base + GPIOLEN(gb));
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+ } else {
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+ writel(low & ~(1 << go), gpio->base + GPIOLEN(gb));
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+ }
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+}
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+
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+static struct irq_chip bcm2708_irqchip = {
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+ .name = "GPIO",
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+ .irq_enable = bcm2708_gpio_irq_unmask,
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+ .irq_disable = bcm2708_gpio_irq_mask,
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+ .irq_unmask = bcm2708_gpio_irq_unmask,
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+ .irq_mask = bcm2708_gpio_irq_mask,
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+ .irq_set_type = bcm2708_gpio_irq_set_type,
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+};
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+
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+static irqreturn_t bcm2708_gpio_interrupt(int irq, void *dev_id)
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+{
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+ unsigned long edsr;
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+ unsigned bank;
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+ int i;
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+ unsigned gpio;
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+ unsigned level_bits;
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+ struct bcm2708_gpio *gpio_data = dev_id;
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+
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+ for (bank = 0; bank < GPIO_BANKS; bank++) {
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+ edsr = readl(__io_address(GPIO_BASE) + GPIOEDS(bank));
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+ level_bits = gpio_data->high[bank] | gpio_data->low[bank];
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+
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+ for_each_set_bit(i, &edsr, 32) {
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+ gpio = i + bank * 32;
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+ /* ack edge triggered IRQs immediately */
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+ if (!(level_bits & (1<<i)))
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+ writel(1<<i,
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+ __io_address(GPIO_BASE) + GPIOEDS(bank));
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+ generic_handle_irq(gpio_to_irq(gpio));
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+ /* ack level triggered IRQ after handling them */
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+ if (level_bits & (1<<i))
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+ writel(1<<i,
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+ __io_address(GPIO_BASE) + GPIOEDS(bank));
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+ }
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+ }
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+ return IRQ_HANDLED;
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+}
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+
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+static struct irqaction bcm2708_gpio_irq = {
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+ .name = "BCM2708 GPIO catchall handler",
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+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
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+ .handler = bcm2708_gpio_interrupt,
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+};
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+
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+static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb)
|
|
+{
|
|
+ unsigned irq;
|
|
+
|
|
+ ucb->gc.to_irq = bcm2708_gpio_to_irq;
|
|
+
|
|
+ for (irq = GPIO_IRQ_START; irq < (GPIO_IRQ_START + GPIO_IRQS); irq++) {
|
|
+ irq_set_chip_data(irq, ucb);
|
|
+ irq_set_chip_and_handler(irq, &bcm2708_irqchip,
|
|
+ handle_simple_irq);
|
|
+ set_irq_flags(irq, IRQF_VALID);
|
|
+ }
|
|
+
|
|
+ bcm2708_gpio_irq.dev_id = ucb;
|
|
+ setup_irq(IRQ_GPIO3, &bcm2708_gpio_irq);
|
|
+}
|
|
+
|
|
+#else
|
|
+
|
|
+static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb)
|
|
+{
|
|
+}
|
|
+
|
|
+#endif /* #if BCM_GPIO_USE_IRQ ***************************************************************************************************************** */
|
|
+
|
|
+static int bcm2708_gpio_probe(struct platform_device *dev)
|
|
+{
|
|
+ struct bcm2708_gpio *ucb;
|
|
+ struct resource *res;
|
|
+ int bank;
|
|
+ int err = 0;
|
|
+
|
|
+ printk(KERN_INFO DRIVER_NAME ": bcm2708_gpio_probe %p\n", dev);
|
|
+
|
|
+ ucb = kzalloc(sizeof(*ucb), GFP_KERNEL);
|
|
+ if (NULL == ucb) {
|
|
+ printk(KERN_ERR DRIVER_NAME ": failed to allocate "
|
|
+ "mailbox memory\n");
|
|
+ err = -ENOMEM;
|
|
+ goto err;
|
|
+ }
|
|
+
|
|
+ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
+
|
|
+ platform_set_drvdata(dev, ucb);
|
|
+ ucb->base = __io_address(GPIO_BASE);
|
|
+
|
|
+ ucb->gc.label = "bcm2708_gpio";
|
|
+ ucb->gc.base = 0;
|
|
+ ucb->gc.ngpio = BCM2708_NR_GPIOS;
|
|
+ ucb->gc.owner = THIS_MODULE;
|
|
+
|
|
+ ucb->gc.direction_input = bcm2708_gpio_dir_in;
|
|
+ ucb->gc.direction_output = bcm2708_gpio_dir_out;
|
|
+ ucb->gc.get = bcm2708_gpio_get;
|
|
+ ucb->gc.set = bcm2708_gpio_set;
|
|
+ ucb->gc.can_sleep = 0;
|
|
+
|
|
+ for (bank = 0; bank < GPIO_BANKS; bank++) {
|
|
+ writel(0, ucb->base + GPIOREN(bank));
|
|
+ writel(0, ucb->base + GPIOFEN(bank));
|
|
+ writel(0, ucb->base + GPIOHEN(bank));
|
|
+ writel(0, ucb->base + GPIOLEN(bank));
|
|
+ writel(0, ucb->base + GPIOAREN(bank));
|
|
+ writel(0, ucb->base + GPIOAFEN(bank));
|
|
+ writel(~0, ucb->base + GPIOEDS(bank));
|
|
+ }
|
|
+
|
|
+ bcm2708_gpio_irq_init(ucb);
|
|
+
|
|
+ err = gpiochip_add(&ucb->gc);
|
|
+
|
|
+err:
|
|
+ return err;
|
|
+
|
|
+}
|
|
+
|
|
+static int bcm2708_gpio_remove(struct platform_device *dev)
|
|
+{
|
|
+ int err = 0;
|
|
+ struct bcm2708_gpio *ucb = platform_get_drvdata(dev);
|
|
+
|
|
+ printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_remove %p\n", dev);
|
|
+
|
|
+ gpiochip_remove(&ucb->gc);
|
|
+
|
|
+ platform_set_drvdata(dev, NULL);
|
|
+ kfree(ucb);
|
|
+
|
|
+ return err;
|
|
+}
|
|
+
|
|
+static struct platform_driver bcm2708_gpio_driver = {
|
|
+ .probe = bcm2708_gpio_probe,
|
|
+ .remove = bcm2708_gpio_remove,
|
|
+ .driver = {
|
|
+ .name = "bcm2708_gpio"},
|
|
+};
|
|
+
|
|
+static int __init bcm2708_gpio_init(void)
|
|
+{
|
|
+ return platform_driver_register(&bcm2708_gpio_driver);
|
|
+}
|
|
+
|
|
+static void __exit bcm2708_gpio_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&bcm2708_gpio_driver);
|
|
+}
|
|
+
|
|
+module_init(bcm2708_gpio_init);
|
|
+module_exit(bcm2708_gpio_exit);
|
|
+
|
|
+MODULE_DESCRIPTION("Broadcom BCM2708 GPIO driver");
|
|
+MODULE_LICENSE("GPL");
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-bcm2708/include/mach/gpio.h
|
|
@@ -0,0 +1,17 @@
|
|
+/*
|
|
+ * arch/arm/mach-bcm2708/include/mach/gpio.h
|
|
+ *
|
|
+ * This file is licensed under the terms of the GNU General Public
|
|
+ * License version 2. This program is licensed "as is" without any
|
|
+ * warranty of any kind, whether express or implied.
|
|
+ */
|
|
+
|
|
+#ifndef __ASM_ARCH_GPIO_H
|
|
+#define __ASM_ARCH_GPIO_H
|
|
+
|
|
+#define BCM2708_NR_GPIOS 54 // number of gpio lines
|
|
+
|
|
+#define gpio_to_irq(x) ((x) + GPIO_IRQ_START)
|
|
+#define irq_to_gpio(x) ((x) - GPIO_IRQ_START)
|
|
+
|
|
+#endif
|
|
--- a/arch/arm/mach-bcm2709/bcm2709.c
|
|
+++ b/arch/arm/mach-bcm2709/bcm2709.c
|
|
@@ -329,6 +329,31 @@ static struct platform_device bcm2708_vc
|
|
},
|
|
};
|
|
|
|
+#ifdef CONFIG_BCM2708_GPIO
|
|
+#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
|
|
+
|
|
+static struct resource bcm2708_gpio_resources[] = {
|
|
+ [0] = { /* general purpose I/O */
|
|
+ .start = GPIO_BASE,
|
|
+ .end = GPIO_BASE + SZ_4K - 1,
|
|
+ .flags = IORESOURCE_MEM,
|
|
+ },
|
|
+};
|
|
+
|
|
+static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
|
|
+
|
|
+static struct platform_device bcm2708_gpio_device = {
|
|
+ .name = BCM_GPIO_DRIVER_NAME,
|
|
+ .id = -1, /* only one VideoCore I/O area */
|
|
+ .resource = bcm2708_gpio_resources,
|
|
+ .num_resources = ARRAY_SIZE(bcm2708_gpio_resources),
|
|
+ .dev = {
|
|
+ .dma_mask = &gpio_dmamask,
|
|
+ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
|
|
+ },
|
|
+};
|
|
+#endif
|
|
+
|
|
int __init bcm_register_device(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
--- /dev/null
|
|
+++ b/include/linux/platform_data/bcm2708.h
|
|
@@ -0,0 +1,23 @@
|
|
+/*
|
|
+ * include/linux/platform_data/bcm2708.h
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License version 2 as
|
|
+ * published by the Free Software Foundation.
|
|
+ *
|
|
+ * (C) 2014 Julian Scheel <julian@jusst.de>
|
|
+ *
|
|
+ */
|
|
+#ifndef __BCM2708_H_
|
|
+#define __BCM2708_H_
|
|
+
|
|
+typedef enum {
|
|
+ BCM2708_PULL_OFF,
|
|
+ BCM2708_PULL_UP,
|
|
+ BCM2708_PULL_DOWN
|
|
+} bcm2708_gpio_pull_t;
|
|
+
|
|
+extern int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset,
|
|
+ bcm2708_gpio_pull_t value);
|
|
+
|
|
+#endif
|