9a59b350b7
Changelogs: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.15 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.16 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46011
133 lines
3.6 KiB
Diff
133 lines
3.6 KiB
Diff
From b65851f41c22b8c69b8fe9ca7782d19ed2155efc Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Thu, 11 Jun 2015 22:57:39 +0200
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Subject: [PATCH] USB: bcma: add bcm53xx support
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The Broadcom ARM SoCs with this usb core need a different
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initialization and they have a different core id. This patch adds
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support for these USB 2.0 core.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/usb/host/bcma-hcd.c | 81 +++++++++++++++++++++++++++++++++++++++++++--
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1 file changed, 78 insertions(+), 3 deletions(-)
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -2,7 +2,8 @@
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* Broadcom specific Advanced Microcontroller Bus
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* Broadcom USB-core driver (BCMA bus glue)
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*
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- * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
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+ * Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
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+ * Copyright 2015 Felix Fietkau <nbd@openwrt.org>
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*
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* Based on ssb-ohci driver
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* Copyright 2007 Michael Buesch <m@bues.ch>
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@@ -88,7 +89,7 @@ static void bcma_hcd_4716wa(struct bcma_
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}
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/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
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-static void bcma_hcd_init_chip(struct bcma_device *dev)
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+static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
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{
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u32 tmp;
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@@ -159,6 +160,70 @@ static void bcma_hcd_init_chip(struct bc
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}
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}
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+static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
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+{
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+ struct bcma_device *arm_core;
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+ void __iomem *dmu;
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+
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+ arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
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+ if (!arm_core) {
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+ dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
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+ return;
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+ }
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+
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+ dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
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+ if (!dmu) {
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+ dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
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+ return;
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+ }
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+
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+ /* Unlock DMU PLL settings */
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+ iowrite32(0x0000ea68, dmu + 0x180);
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+
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+ /* Write USB 2.0 PLL control setting */
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+ iowrite32(0x00dd10c3, dmu + 0x164);
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+
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+ /* Lock DMU PLL settings */
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+ iowrite32(0x00000000, dmu + 0x180);
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+
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+ iounmap(dmu);
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+}
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+
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+static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
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+{
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+ u32 val;
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+
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+ /*
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+ * Delay after PHY initialized to ensure HC is ready to be configured
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+ */
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+ usleep_range(1000, 2000);
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+
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+ /* Set packet buffer OUT threshold */
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+ val = bcma_read32(dev, 0x94);
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+ val &= 0xffff;
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+ val |= 0x80 << 16;
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+ bcma_write32(dev, 0x94, val);
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+
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+ /* Enable break memory transfer */
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+ val = bcma_read32(dev, 0x9c);
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+ val |= 1;
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+ bcma_write32(dev, 0x9c, val);
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+}
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+
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+static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
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+{
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+ bcma_core_enable(dev, 0);
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+
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+ if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
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+ dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
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+ if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
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+ dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
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+ bcma_hcd_init_chip_arm_phy(dev);
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+
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+ bcma_hcd_init_chip_arm_hc(dev);
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+ }
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+}
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+
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static const struct usb_ehci_pdata ehci_pdata = {
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};
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@@ -230,7 +295,16 @@ static int bcma_hcd_probe(struct bcma_de
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if (!usb_dev)
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return -ENOMEM;
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- bcma_hcd_init_chip(dev);
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+ switch (dev->id.id) {
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+ case BCMA_CORE_NS_USB20:
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+ bcma_hcd_init_chip_arm(dev);
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+ break;
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+ case BCMA_CORE_USB20_HOST:
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+ bcma_hcd_init_chip_mips(dev);
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+ break;
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+ default:
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+ return -ENODEV;
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+ }
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/* In AI chips EHCI is addrspace 0, OHCI is 1 */
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ohci_addr = dev->addr_s[0];
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@@ -299,6 +373,7 @@ static int bcma_hcd_resume(struct bcma_d
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static const struct bcma_device_id bcma_hcd_table[] = {
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BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
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+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
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BCMA_CORETABLE_END
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};
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MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
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