171 lines
4.8 KiB
C
171 lines
4.8 KiB
C
/*
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* Buffalo BHR-4GRV2 board support
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*
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* Copyright (c) 2012 Qualcomm Atheros
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* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
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*
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* Based on mach-ap136.c and mach-wzr-450hp2.c
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#define BHR_4GRV2_GPIO_LED_VPN_RED 3
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#define BHR_4GRV2_GPIO_LED_VPN_GREEN 18
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#define BHR_4GRV2_GPIO_LED_POWER_GREEN 19
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#define BHR_4GRV2_GPIO_LED_DIAG_RED 20
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#define BHR_4GRV2_GPIO_BTN_RESET 17
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#define BHR_4GRV2_GPIO_BTN_ECO 21
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#define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */
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#define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL)
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#define BHR_4GRV2_MAC0_OFFSET 0
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#define BHR_4GRV2_MAC1_OFFSET 6
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static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = {
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{
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.name = "buffalo:red:vpn",
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.gpio = BHR_4GRV2_GPIO_LED_VPN_RED,
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.active_low = 1,
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},
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{
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.name = "buffalo:green:vpn",
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.gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN,
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.active_low = 1,
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},
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{
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.name = "buffalo:green:power",
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.gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN,
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.active_low = 1,
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},
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{
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.name = "buffalo:red:diag",
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.gpio = BHR_4GRV2_GPIO_LED_DIAG_RED,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
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.gpio = BHR_4GRV2_GPIO_BTN_RESET,
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.active_low = 1,
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},
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{
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.desc = "ECO button",
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.type = EV_KEY,
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.code = BTN_0,
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.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
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.gpio = BHR_4GRV2_GPIO_BTN_ECO,
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.active_low = 1,
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},
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};
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/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
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static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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/* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
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static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data bhr_4grv2_ar8327_data = {
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.pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg,
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.pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info bhr_4grv2_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &bhr_4grv2_ar8327_data,
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},
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};
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static void __init bhr_4grv2_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio),
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bhr_4grv2_leds_gpio);
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ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(bhr_4grv2_gpio_keys),
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bhr_4grv2_gpio_keys);
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mdiobus_register_board_info(bhr_4grv2_mdio0_info,
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ARRAY_SIZE(bhr_4grv2_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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/* GMAC0 is connected to the RGMII interface */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x56000000;
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ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0);
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ath79_register_eth(0);
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/* GMAC1 is connected to the SGMII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0);
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ath79_register_eth(1);
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}
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MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2",
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"Buffalo BHR-4GRV2", bhr_4grv2_setup);
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