88ca6390ea
Refresh patches on all 4.4 supported platforms. Compile & run tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
33 lines
1,020 B
Diff
33 lines
1,020 B
Diff
From 2f3ea65dc8909cbf4116bd74b3dea8d25749508f Mon Sep 17 00:00:00 2001
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From: Zhao Qiang <qiang.zhao@nxp.com>
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Date: Wed, 23 Nov 2016 11:29:45 +0800
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Subject: [PATCH 235/238] pci/layerscape: fix pci lut offset issue
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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---
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drivers/pci/host/pci-layerscape.c | 13 ++++---------
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1 file changed, 4 insertions(+), 9 deletions(-)
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--- a/drivers/pci/host/pci-layerscape.c
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+++ b/drivers/pci/host/pci-layerscape.c
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@@ -158,16 +158,11 @@ static void ls1021_pcie_host_init(struct
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static int ls_pcie_link_up(struct pcie_port *pp)
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{
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struct ls_pcie *pcie = to_ls_pcie(pp);
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- u32 state, offset;
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+ u32 state;
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- if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL))
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- offset = 0x407fc;
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- else
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- offset = PCIE_LUT_DBG;
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-
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- state = (ioread32(pcie->lut + offset) >>
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- pcie->drvdata->ltssm_shift) &
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- LTSSM_STATE_MASK;
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+ state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
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+ pcie->drvdata->ltssm_shift) &
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+ LTSSM_STATE_MASK;
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if (state < LTSSM_PCIE_L0)
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return 0;
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