42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
--- a/drivers/ssb/driver_chipcommon.c
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+++ b/drivers/ssb/driver_chipcommon.c
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@@ -318,6 +318,8 @@ void ssb_chipco_resume(struct ssb_chipco
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void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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@@ -341,6 +343,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
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void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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--- a/drivers/ssb/driver_mipscore.c
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+++ b/drivers/ssb/driver_mipscore.c
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@@ -241,6 +241,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
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if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
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rate = 200000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 240000000;
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} else {
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rate = ssb_calc_clock_rate(pll_type, n, m);
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}
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -1105,6 +1105,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
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if (bus->chip_id == 0x5365) {
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rate = 100000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 120000000;
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} else {
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rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
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if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
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