81c999bbda
This also adds dts nodes for cpc and mc for documentation purposes Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> SVN-Revision: 47836
109 lines
1.7 KiB
Text
109 lines
1.7 KiB
Text
/dts-v1/;
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#include "mt7621.dtsi"
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/ {
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compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
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model = "D-Link DIR-860L B1";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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palmbus@1E000000 {
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spi@b00 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mx25l12805d";
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reg = <0 0>;
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linux,modalias = "m25p80";
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spi-max-frequency = <10000000>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x4000>;
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read-only;
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};
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radio: partition@34000 {
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label = "radio";
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reg = <0x34000 0x4000>;
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read-only;
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};
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factory: partition@38000 {
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label = "factory";
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reg = <0x38000 0x8000>;
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read-only;
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};
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partition@40000 {
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label = "defaults";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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pcie@1e140000 {
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status = "okay";
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pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&radio 0x2000>;
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mediatek,2ghz = <0>;
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};
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};
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pcie1 {
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mt76@1,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&radio 0>;
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mediatek,5ghz = <0>;
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};
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};
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};
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pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
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ralink,function = "gpio";
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};
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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};
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};
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