9aa196e0f2
Refresh patches, following required reworking: ar71xx/patches-4.9/930-chipidea-pullup.patch layerscape/patches-4.9/302-dts-support-layercape.patch sunxi/patches-4.9/0052-stmmac-form-4-12.patch Fixes for CVEs: CVE-2018-1108 CVE-2018-1092 Tested on: ar71xx Archer C7 v2 Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Tested-by: Arjen de Korte <build+openwrt@de-korte.org>
34 lines
1.1 KiB
Diff
34 lines
1.1 KiB
Diff
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Subject: [PATCH] mtd: spi-nor: detect JEDEC incompatible w25q128 using 0x90
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command
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some w25q128 chipsets don't support RDID (0x9f) command, they reply with
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0xff-s only. To suppose such flashes fallback to the 0x90 command.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -1194,6 +1194,18 @@ static const struct flash_info *spi_nor_
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}
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dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
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id[0], id[1], id[2]);
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+
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+ tmp = nor->read_reg(nor, 0x90, id, SPI_NOR_MAX_ID_LEN);
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+ if (tmp < 0) {
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+ dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp);
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+ return ERR_PTR(tmp);
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+ }
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+ dev_info(nor->dev, "using Read Manufacturer / Device ID command (0x%02x) returned %02x %02x\n",
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+ 0x90, id[0x03], id[0x04]);
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+ if (id[0x03] == 0xef && id[0x04] == 0x17) {
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+ return spi_nor_match_id("w25q128");
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+ }
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+
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return ERR_PTR(-ENODEV);
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}
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