openwrtv3/target/linux/ar71xx/base-files/etc
Jo-Philipp Wich 98b14e0906 ar71xx: fix TL-WR842N v2 switch port order
The TL-WR842N v2 has the following switch port layout with swconfig port 0
being connected to eth1:

            Power  LAN4    LAN3    LAN2    LAN1    WAN     USB
             (*) | [...] | [...] | [...] | [...] | [...] | [.]
    swconfig port:   1       4       3       2      n/a
    netdev:        eth1    eth1    eth1    eth1    eth0

Adjust the board defaults to match this model specific layout.

Signed-off-by: Jo-Philipp Wich <jo@mein.io>
2016-12-14 18:43:48 +01:00
..
board.d ar71xx: fix TL-WR842N v2 switch port order 2016-12-14 18:43:48 +01:00
hotplug.d ar71xx: add support for YunCore SR3200 and XD3200 2016-12-12 09:57:40 +01:00
uci-defaults ar71xx: remove PB92 reference design board support 2016-12-12 10:22:18 +01:00
diag.sh ar71xx: remove AP81 reference design board support 2016-12-12 10:22:18 +01:00
inittab image / basefiles: make console password configurable 2016-04-18 21:53:07 +02:00