2be307c998
This patch implements CPU frequency control as found on several routerboard devices. Supported SoCs: - QCA953X - AR9344 Tested on hAP lite and mAP lite (QCA953x): steps of 50MHz Tested on LHG 5 (AR9344): steps of 50MHz On unsupported hardware, this patch is a NOP: it will not alter the new field. "rbcfg help" will display an empty "cpu_freq" help listing. "rbcfg show" will not show the cpu_freq field. "rbcfg set/get cpu_freq" will return an error code. Signed-off-by: Thibaut VARENE <hacks@slashdirt.org> [adjusted subject] Signed-off-by: Jo-Philipp Wich <jo@mein.io>
85 lines
2 KiB
C
85 lines
2 KiB
C
/*
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* Mikrotik's RouterBOOT configuration defines
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#ifndef _RBCFG_H
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#define _RBCFG_H
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/*
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* Magic numbers
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*/
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#define RB_MAGIC_SOFT 0x74666f53 /* 'Soft' */
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/*
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* ID values for Software settings
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*/
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#define RB_ID_TERMINATOR 0
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#define RB_ID_UART_SPEED 1
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#define RB_ID_BOOT_DELAY 2
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#define RB_ID_BOOT_DEVICE 3
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#define RB_ID_BOOT_KEY 4
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#define RB_ID_CPU_MODE 5
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#define RB_ID_FW_VERSION 6
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#define RB_ID_SOFT_07 7
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#define RB_ID_SOFT_08 8
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#define RB_ID_BOOT_PROTOCOL 9
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#define RB_ID_SOFT_10 10
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#define RB_ID_SOFT_11 11
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#define RB_ID_CPU_FREQ 12
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#define RB_ID_BOOTER 13
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#define RB_UART_SPEED_115200 0
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#define RB_UART_SPEED_57600 1
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#define RB_UART_SPEED_38400 2
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#define RB_UART_SPEED_19200 3
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#define RB_UART_SPEED_9600 4
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#define RB_UART_SPEED_4800 5
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#define RB_UART_SPEED_2400 6
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#define RB_UART_SPEED_1200 7
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#define RB_UART_SPEED_OFF 8
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#define RB_BOOT_DELAY_1SEC 1
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#define RB_BOOT_DELAY_2SEC 2
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#define RB_BOOT_DELAY_3SEC 3
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#define RB_BOOT_DELAY_4SEC 4
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#define RB_BOOT_DELAY_5SEC 5
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#define RB_BOOT_DELAY_6SEC 6
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#define RB_BOOT_DELAY_7SEC 7
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#define RB_BOOT_DELAY_8SEC 8
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#define RB_BOOT_DELAY_9SEC 9
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#define RB_BOOT_DEVICE_ETHER 0
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#define RB_BOOT_DEVICE_NANDETH 1
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#define RB_BOOT_DEVICE_CFCARD 2
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#define RB_BOOT_DEVICE_ETHONCE 3
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#define RB_BOOT_DEVICE_NANDONLY 5
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#define RB_BOOT_DEVICE_FLASHCFG 7
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#define RB_BOOT_DEVICE_FLSHONCE 8
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#define RB_BOOT_KEY_ANY 0
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#define RB_BOOT_KEY_DEL 1
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#define RB_CPU_MODE_POWERSAVE 0
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#define RB_CPU_MODE_REGULAR 1
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#define RB_BOOT_PROTOCOL_BOOTP 0
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#define RB_BOOT_PROTOCOL_DHCP 1
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#define RB_CPU_FREQ_L2 (0 << 3)
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#define RB_CPU_FREQ_L1 (1 << 3)
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#define RB_CPU_FREQ_N0 (2 << 3)
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#define RB_CPU_FREQ_H1 (3 << 3)
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#define RB_CPU_FREQ_H2 (4 << 3)
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#define RB_CPU_FREQ_H3 (5 << 3)
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#define RB_BOOTER_REGULAR 0
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#define RB_BOOTER_BACKUP 1
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#endif /* _RBCFG_H */
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