fc03b3aa16
The Cavium OCTEON TX is an ARM 64-bit SoC leveraging CPU cores and periperhals from the Cavium ThunderX SoC. This initial support provides a 4.14 kernel and kernel+initramfs that is bootable on the Gateworks Newport GW630x as well as the Cavium sff8104 reference board. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
148 lines
4.9 KiB
Diff
148 lines
4.9 KiB
Diff
From 69a99101748bb1bdb2730393ef48bc152c4d244a Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Tue, 12 Dec 2017 12:49:55 -0800
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Subject: [PATCH] net: thunderx: add support for rgmii internal delay modes
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The XCV_DLL_CTL is being configured with the assumption that
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phy-mode is rgmii-txid (PHY_INTERFACE_MODE_RGMII_TXID) which is not always
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the case.
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This patch parses the phy-mode property and uses it to configure CXV_DLL_CTL
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properly.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 13 +++++++---
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drivers/net/ethernet/cavium/thunder/thunder_bgx.h | 2 +-
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drivers/net/ethernet/cavium/thunder/thunder_xcv.c | 31 ++++++++++++++++++-----
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3 files changed, 35 insertions(+), 11 deletions(-)
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diff --git a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
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index 5e5c4d7..805c02a 100644
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--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
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+++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
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@@ -55,6 +55,7 @@ struct bgx {
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struct pci_dev *pdev;
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bool is_dlm;
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bool is_rgx;
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+ int phy_mode;
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};
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static struct bgx *bgx_vnic[MAX_BGX_THUNDER];
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@@ -841,12 +842,12 @@ static void bgx_poll_for_link(struct work_struct *work)
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queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2);
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}
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-static int phy_interface_mode(u8 lmac_type)
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+static int phy_interface_mode(struct bgx *bgx, u8 lmac_type)
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{
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if (lmac_type == BGX_MODE_QSGMII)
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return PHY_INTERFACE_MODE_QSGMII;
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if (lmac_type == BGX_MODE_RGMII)
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- return PHY_INTERFACE_MODE_RGMII;
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+ return bgx->phy_mode;
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return PHY_INTERFACE_MODE_SGMII;
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}
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@@ -912,7 +913,8 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
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if (phy_connect_direct(&lmac->netdev, lmac->phydev,
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bgx_lmac_handler,
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- phy_interface_mode(lmac->lmac_type)))
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+ phy_interface_mode(bgx,
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+ lmac->lmac_type)))
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return -ENODEV;
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phy_start_aneg(lmac->phydev);
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@@ -1287,6 +1289,8 @@ static int bgx_init_of_phy(struct bgx *bgx)
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bgx->lmac[lmac].lmacid = lmac;
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phy_np = of_parse_phandle(node, "phy-handle", 0);
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+ if (phy_np)
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+ bgx->phy_mode = of_get_phy_mode(phy_np);
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/* If there is no phy or defective firmware presents
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* this cortina phy, for which there is no driver
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* support, ignore it.
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@@ -1390,7 +1394,6 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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bgx->max_lmac = 1;
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bgx->bgx_id = MAX_BGX_PER_CN81XX - 1;
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bgx_vnic[bgx->bgx_id] = bgx;
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- xcv_init_hw();
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}
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/* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one
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@@ -1407,6 +1410,8 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (err)
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goto err_enable;
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+ if (bgx->is_rgx)
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+ xcv_init_hw(bgx->phy_mode);
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bgx_init_hw(bgx);
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/* Enable all LMACs */
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diff --git a/drivers/net/ethernet/cavium/thunder/thunder_bgx.h b/drivers/net/ethernet/cavium/thunder/thunder_bgx.h
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index 23acdc5..2bba9d1 100644
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--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.h
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+++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.h
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@@ -226,7 +226,7 @@ void bgx_lmac_internal_loopback(int node, int bgx_idx,
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void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause);
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void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause);
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-void xcv_init_hw(void);
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+void xcv_init_hw(int phy_mode);
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void xcv_setup_link(bool link_up, int link_speed);
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u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx);
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diff --git a/drivers/net/ethernet/cavium/thunder/thunder_xcv.c b/drivers/net/ethernet/cavium/thunder/thunder_xcv.c
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index 578c7f8..7e0c4cb 100644
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--- a/drivers/net/ethernet/cavium/thunder/thunder_xcv.c
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+++ b/drivers/net/ethernet/cavium/thunder/thunder_xcv.c
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@@ -65,7 +65,7 @@ MODULE_LICENSE("GPL v2");
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MODULE_VERSION(DRV_VERSION);
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MODULE_DEVICE_TABLE(pci, xcv_id_table);
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-void xcv_init_hw(void)
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+void xcv_init_hw(int phy_mode)
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{
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u64 cfg;
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@@ -81,12 +81,31 @@ void xcv_init_hw(void)
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/* Wait for DLL to lock */
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msleep(1);
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- /* Configure DLL - enable or bypass
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- * TX no bypass, RX bypass
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- */
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+ /* enable/bypass DLL providing MAC based internal TX/RX delays */
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cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL);
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- cfg &= ~0xFF03;
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- cfg |= CLKRX_BYP;
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+ cfg &= ~0xffff00;
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+ switch (phy_mode) {
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+ /* RX and TX delays are added by the MAC */
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+ case PHY_INTERFACE_MODE_RGMII:
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+ break;
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+ /* internal RX and TX delays provided by the PHY */
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+ case PHY_INTERFACE_MODE_RGMII_ID:
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+ cfg |= CLKRX_BYP;
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+ cfg |= CLKTX_BYP;
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+ break;
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+ /* internal RX delay provided by the PHY, the MAC
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+ * should not add an RX delay in this case
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+ */
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ cfg |= CLKRX_BYP;
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+ break;
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+ /* internal TX delay provided by the PHY, the MAC
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+ * should not add an TX delay in this case
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+ */
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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+ cfg |= CLKRX_BYP;
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+ break;
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+ }
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writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL);
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/* Enable compensation controller and force the
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--
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2.7.4
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