25afe99b31
the support is still WIP. next steps are to make the pmic and ethernet work. this is the first commit to make sure nothing gets lost. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47354
57 lines
2.2 KiB
Diff
57 lines
2.2 KiB
Diff
From 9b799b8a4ecbf560f8fb996e8e5147a8f7b9a1b3 Mon Sep 17 00:00:00 2001
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From: Sascha Hauer <s.hauer@pengutronix.de>
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Date: Wed, 13 May 2015 10:52:41 +0200
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Subject: [PATCH 22/76] dt-bindings: thermal: Add binding document for
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Mediatek thermal controller
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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---
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.../bindings/thermal/mediatek-thermal.txt | 36 ++++++++++++++++++++
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1 file changed, 36 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
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diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
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new file mode 100644
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index 0000000..adf5d2c
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
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@@ -0,0 +1,36 @@
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+* Mediatek Thermal
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+
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+This describes the device tree binding for the Mediatek thermal controller
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+which measures the on-SoC temperatures. This device does not have its own ADC,
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+instead it directly controls the AUXADC via AHB bus accesses. For this reason
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+this device needs phandles to the AUXADC.
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+
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+Required properties:
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+- compatible: "mediatek,mt8173-thermal"
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+- reg: Address range of the thermal controller
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+- interrupts: IRQ for the thermal controller
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+- clocks, clock-names: Clocks needed for the thermal controller. required
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+ clocks are:
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+ "therm": Main clock needed for register access
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+ "auxadc": The AUXADC clock
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+- resets, reset-names: Reference to the reset controller controlling the thermal
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+ controller. Required reset-names:
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+ "therm": The main reset line
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+- auxadc: A phandle to the AUXADC which the thermal controller uses
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+- apmixedsys: A phandle to the APMIXEDSYS controller.
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+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
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+
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+Example:
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+
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+ thermal: thermal@1100b000 {
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+ #thermal-sensor-cells = <1>;
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+ compatible = "mediatek,mt8173-thermal";
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+ reg = <0 0x1100b000 0 0x1000>;
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+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
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+ clock-names = "therm", "auxadc";
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+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
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+ reset-names = "therm";
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+ auxadc = <&auxadc>;
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+ apmixedsys = <&apmixedsys>;
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+ };
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--
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1.7.10.4
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