f5affd4f36
SVN-Revision: 15918
152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
#ifndef _LINUX_LIS302DL_H
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#define _LINUX_LIS302DL_H
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#include <linux/types.h>
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#include <linux/spi/spi.h>
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#include <linux/input.h>
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#include <linux/workqueue.h>
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struct lis302dl_info;
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struct lis302dl_platform_data {
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char *name;
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unsigned long pin_chip_select;
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unsigned long pin_clk;
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unsigned long pin_mosi;
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unsigned long pin_miso;
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int open_drain;
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int interrupt;
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void (*lis302dl_suspend_io)(struct lis302dl_info *, int resuming);
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};
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struct lis302dl_info {
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struct lis302dl_platform_data *pdata;
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struct device *dev;
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struct input_dev *input_dev;
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unsigned int flags;
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unsigned int threshold;
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unsigned int duration;
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u32 overruns;
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struct {
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unsigned int threshold; /* mg */
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unsigned int duration; /* ms */
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} wakeup;
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struct spi_device *spi;
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u_int8_t regs[0x40];
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};
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enum lis302dl_reg {
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LIS302DL_REG_WHO_AM_I = 0x0f,
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LIS302DL_REG_CTRL1 = 0x20,
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LIS302DL_REG_CTRL2 = 0x21,
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LIS302DL_REG_CTRL3 = 0x22,
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LIS302DL_REG_HP_FILTER_RESET = 0x23,
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LIS302DL_REG_STATUS = 0x27,
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LIS302DL_REG_OUT_X = 0x29,
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LIS302DL_REG_OUT_Y = 0x2b,
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LIS302DL_REG_OUT_Z = 0x2d,
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LIS302DL_REG_FF_WU_CFG_1 = 0x30,
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LIS302DL_REG_FF_WU_SRC_1 = 0x31,
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LIS302DL_REG_FF_WU_THS_1 = 0x32,
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LIS302DL_REG_FF_WU_DURATION_1 = 0x33,
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LIS302DL_REG_FF_WU_CFG_2 = 0x34,
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LIS302DL_REG_FF_WU_SRC_2 = 0x35,
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LIS302DL_REG_FF_WU_THS_2 = 0x36,
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LIS302DL_REG_FF_WU_DURATION_2 = 0x37,
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LIS302DL_REG_CLICK_CFG = 0x38,
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LIS302DL_REG_CLICK_SRC = 0x39,
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LIS302DL_REG_CLICK_THSY_X = 0x3b,
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LIS302DL_REG_CLICK_THSZ = 0x3c,
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LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d,
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LIS302DL_REG_CLICK_LATENCY = 0x3e,
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LIS302DL_REG_CLICK_WINDOW = 0x3f,
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};
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enum lis302dl_reg_ctrl1 {
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LIS302DL_CTRL1_Xen = 0x01,
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LIS302DL_CTRL1_Yen = 0x02,
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LIS302DL_CTRL1_Zen = 0x04,
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LIS302DL_CTRL1_STM = 0x08,
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LIS302DL_CTRL1_STP = 0x10,
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LIS302DL_CTRL1_FS = 0x20,
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LIS302DL_CTRL1_PD = 0x40,
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LIS302DL_CTRL1_DR = 0x80,
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};
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enum lis302dl_reg_ctrl2 {
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LIS302DL_CTRL2_HPC1 = 0x01,
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LIS302DL_CTRL2_HPC2 = 0x02,
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LIS302DL_CTRL2_HPFF1 = 0x04,
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LIS302DL_CTRL2_HPFF2 = 0x08,
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LIS302DL_CTRL2_FDS = 0x10,
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LIS302DL_CTRL2_BOOT = 0x40,
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LIS302DL_CTRL2_SIM = 0x80,
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};
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enum lis302dl_reg_ctrl3 {
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LIS302DL_CTRL3_PP_OD = 0x40,
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LIS302DL_CTRL3_IHL = 0x80,
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};
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enum lis302dl_reg_status {
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LIS302DL_STATUS_XDA = 0x01,
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LIS302DL_STATUS_YDA = 0x02,
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LIS302DL_STATUS_ZDA = 0x04,
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LIS302DL_STATUS_XYZDA = 0x08,
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LIS302DL_STATUS_XOR = 0x10,
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LIS302DL_STATUS_YOR = 0x20,
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LIS302DL_STATUS_ZOR = 0x40,
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LIS302DL_STATUS_XYZOR = 0x80,
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};
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/* Wakeup/freefall interrupt defs */
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enum lis302dl_reg_ffwucfg {
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LIS302DL_FFWUCFG_XLIE = 0x01,
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LIS302DL_FFWUCFG_XHIE = 0x02,
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LIS302DL_FFWUCFG_YLIE = 0x04,
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LIS302DL_FFWUCFG_YHIE = 0x08,
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LIS302DL_FFWUCFG_ZLIE = 0x10,
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LIS302DL_FFWUCFG_ZHIE = 0x20,
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LIS302DL_FFWUCFG_LIR = 0x40,
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LIS302DL_FFWUCFG_AOI = 0x80,
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};
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enum lis302dl_reg_ffwuths {
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LIS302DL_FFWUTHS_DCRM = 0x80,
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};
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enum lis302dl_reg_ffwusrc {
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LIS302DL_FFWUSRC_XL = 0x01,
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LIS302DL_FFWUSRC_XH = 0x02,
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LIS302DL_FFWUSRC_YL = 0x04,
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LIS302DL_FFWUSRC_YH = 0x08,
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LIS302DL_FFWUSRC_ZL = 0x10,
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LIS302DL_FFWUSRC_ZH = 0x20,
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LIS302DL_FFWUSRC_IA = 0x40,
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};
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enum lis302dl_reg_cloik_src {
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LIS302DL_CLICKSRC_SINGLE_X = 0x01,
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LIS302DL_CLICKSRC_DOUBLE_X = 0x02,
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LIS302DL_CLICKSRC_SINGLE_Y = 0x04,
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LIS302DL_CLICKSRC_DOUBLE_Y = 0x08,
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LIS302DL_CLICKSRC_SINGLE_Z = 0x10,
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LIS302DL_CLICKSRC_DOUBLE_Z = 0x20,
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LIS302DL_CLICKSRC_IA = 0x40,
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};
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#define LIS302DL_WHO_AM_I_MAGIC 0x3b
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#define LIS302DL_F_WUP_FF_1 0x0001 /* wake up from free fall */
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#define LIS302DL_F_WUP_FF_2 0x0002
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#define LIS302DL_F_WUP_FF 0x0003
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#define LIS302DL_F_WUP_CLICK 0x0004
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#define LIS302DL_F_POWER 0x0010
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#define LIS302DL_F_FS 0x0020 /* ADC full scale */
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#define LIS302DL_F_INPUT_OPEN 0x0040 /* Set if input device is opened */
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#define LIS302DL_F_IRQ_WAKE 0x0080 /* IRQ is setup in wake mode */
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#define LIS302DL_F_DR 0x0100 /* Data rate, 400Hz/100Hz */
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#endif /* _LINUX_LIS302DL_H */
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