d70ec3008d
Specify firmware partition format by compatible string.
formats in ramips:
- denx,uimage
- tplink,firmware
- seama
It's unlikely but the firmware splitting might not work any longer for
the following boards, due to a custom header:
- EX2700: two uImage headers
- BR-6478AC-V2: edimax-header
- 3G-6200N: edimax-header
- 3G-6200NL: edimax-header
- BR-6475ND: edimax-header
- TEW-638APB-V2: umedia-header
- RT-N56U: mkrtn56uimg
But it rather looks like the uImage splitter is fine with the extra
header.
The following dts are not touched, due to lack of a compatible string in
the matching firmware splitter submodule:
- CONFIG_MTD_SPLIT_JIMAGE_FW
DWR-116-A1.dts
DWR-118-A2.dts
DWR-512-B.dts
DWR-921-C1.dts
LR-25G001.dts
- CONFIG_MTD_SPLIT_TRX_FW
WCR-1166DS.dts
WSR-1166.dts
- CONFIG_MTD_SPLIT_MINOR_FW
RBM11G.dts
RBM33G.dts
- CONFIG_MTD_SPLIT_LZMA_FW
AR670W.dts
- CONFIG_MTD_SPLIT_WRGG_FW
DAP-1522-A1.dts
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
120 lines
1.8 KiB
Text
120 lines
1.8 KiB
Text
/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
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model = "Ralink MT7620a V22SG High Power evaluation board";
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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aoss {
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label = "aoss";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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nand {
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compatible = "mtk,mt7620-nand";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x20000>;
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read-only;
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};
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factory: partition@60000 {
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label = "factory";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x80000 0x7f80000>;
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};
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uartf", "spi";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
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mediatek,portmap = "llllw";
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,port4 = "gmac";
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};
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&pcie {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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