66e35c5246
In order for the image to be built, some patches need to be ported to 3.19. Add the relevant patches. Note that most of them (if not all) should be merged in 3.20, removing the need to carry them on then. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> SVN-Revision: 44267
39 lines
1 KiB
Diff
39 lines
1 KiB
Diff
From 7eb1f09ec8e25aa2fc3f6fc5fc9405d9f917d503 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Thu, 11 Dec 2014 14:14:58 +0100
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Subject: [PATCH 1/2] ARM: mvebu: A385-AP: Enable the NAND controller
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The A385 AP has a 1GB NAND chip. Enable it.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/armada-385-db-ap.dts | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
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index 3a51531eb37b..02db04867d8f 100644
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--- a/arch/arm/boot/dts/armada-385-db-ap.dts
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+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
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@@ -122,6 +122,19 @@
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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+
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+ nfc: flash@d0000 {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ num-cs = <1>;
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+ nand-ecc-strength = <4>;
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+ nand-ecc-step-size = <512>;
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+ marvell,nand-keep-config;
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+ marvell,nand-enable-arbiter;
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+ nand-on-flash-bbt;
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+ };
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};
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pcie-controller {
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--
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2.2.1
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