193 lines
5 KiB
C
193 lines
5 KiB
C
/*
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* Copyright (C) 2004 Peng Liu <peng.liu@infineon.com>
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* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
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* Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <asm/reboot.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/cpu.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/amazon/amazon.h>
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#include <asm/amazon/irq.h>
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#include <asm/amazon/model.h>
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static unsigned int r4k_offset;
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static unsigned int r4k_cur;
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/* required in arch/mips/kernel/kspd.c */
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unsigned long cpu_khz;
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static void amazon_reboot_setup(void);
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/* the CPU clock rate - lifted from u-boot */
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unsigned int amazon_get_cpu_hz(void)
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{
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/*-----------------------------------*/
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/**CGU CPU Clock Reduction Register***/
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/*-----------------------------------*/
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switch(amazon_readl(AMAZON_CGU_CPUCRD) & 0x3){
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case 0:
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/*divider ration 1/1, 235 MHz clock */
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return 235000000;
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case 1:
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/*divider ration 2/3, 235 MHz clock, clock not accurate, here */
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return 150000000;
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case 2:
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/*divider ration 1/2, 235 MHz clock */
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return 117500000;
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default:
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/*divider ration 1/4, 235 MHz clock */
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return 58750000;
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}
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}
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/* the FPI clock rate - lifted from u-boot */
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unsigned int amazon_get_fpi_hz(void)
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{
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unsigned int clkCPU;
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clkCPU = amazon_get_cpu_hz();
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/*-------------------------------------*/
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/***CGU Clock Divider Select Register***/
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/*-------------------------------------*/
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switch (amazon_readl(AMAZON_CGU_DIV) & 0x3)
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{
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case 1:
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return clkCPU >> 1;
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case 2:
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return clkCPU >> 2;
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default:
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return clkCPU;
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/* '11' is reserved */
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}
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}
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EXPORT_SYMBOL(amazon_get_fpi_hz);
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/* this doesn't really belong here, but it's a convenient location */
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unsigned int amazon_get_cpu_ver(void)
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{
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static unsigned int cpu_ver = 0;
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if (cpu_ver == 0)
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cpu_ver = amazon_readl(AMAZON_MCD_CHIPID) & 0xFFFFF000;
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return cpu_ver;
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}
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static inline u32 amazon_get_counter_resolution(void)
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{
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u32 res;
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__asm__ __volatile__(
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".set push\n"
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".set mips32r2\n"
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".set noreorder\n"
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"rdhwr %0, $3\n"
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"ehb\n"
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".set pop\n"
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: "=&r" (res)
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: /* no input */
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: "memory");
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instruction_hazard();
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return res;
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}
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void __init plat_time_init(void)
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{
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mips_hpt_frequency = amazon_get_cpu_hz() / amazon_get_counter_resolution();
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r4k_offset = mips_hpt_frequency / HZ;
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printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
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printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
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r4k_cur = (read_c0_count() + r4k_offset);
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write_c0_compare(r4k_cur);
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/* enable the timer in the PMU */
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amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
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/* setup the GPTU for timer tick f_fpi == f_gptu*/
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amazon_writel(0x0100, AMAZON_GPTU_CLC);
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amazon_writel(0xffff, AMAZON_GPTU_CAPREL);
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amazon_writel(0x80C0, AMAZON_GPTU_T6CON);
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}
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void __init plat_mem_setup(void)
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{
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u32 chipid = 0;
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u32 part_no = 0;
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chipid = amazon_readl(AMAZON_MCD_CHIPID);
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part_no = AMAZON_MCD_CHIPID_PART_NUMBER_GET(chipid);
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if(part_no == AMAZON_CHIPID_YANGTSE){
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printk("Yangtse Version\n");
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} else if (part_no == AMAZON_CHIPID_STANDARD) {
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printk(SYSTEM_MODEL_NAME "\n");
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} else {
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printk("unknown version %8x\n",part_no);
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}
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amazon_reboot_setup();
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//stop reset TPE and DFE
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amazon_writel(0, AMAZON_RST_REQ);
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//clock
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amazon_writel(0x3fff, AMAZON_PMU_PWDCR);
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//reenable trace capability
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part_no = readl(AMAZON_BCU_ECON);
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ioport_resource.start = IOPORT_RESOURCE_START;
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ioport_resource.end = IOPORT_RESOURCE_END;
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iomem_resource.start = IOMEM_RESOURCE_START;
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iomem_resource.end = IOMEM_RESOURCE_END;
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}
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static void amazon_machine_restart(char *command)
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{
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local_irq_disable();
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amazon_writel(AMAZON_RST_ALL, AMAZON_RST_REQ);
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for (;;) ;
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}
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static void amazon_machine_halt(void)
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{
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printk(KERN_NOTICE "System halted.\n");
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local_irq_disable();
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for (;;) ;
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}
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static void amazon_machine_power_off(void)
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{
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printk(KERN_NOTICE "Please turn off the power now.\n");
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local_irq_disable();
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for (;;) ;
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}
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static void amazon_reboot_setup(void)
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{
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_machine_restart = amazon_machine_restart;
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_machine_halt = amazon_machine_halt;
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pm_power_off = amazon_machine_power_off;
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}
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