6eaf8b3d89
Updated the devicetree source files to make use of the following upstreamed drivers: - xrx200 ethernet phy - reset controller unit - dwc2 - fpi Use our custom xrx200 ethernet phy compatible to support boards, which have switched the vr9 revision during lifetime, with a single devicetree source file. By switching to the dwc2 driver + usb phy framework, we don't need to used our custom gpio power patch and can use a fixed regulator instead. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mathias Kresin <dev@kresin.me>
329 lines
5.7 KiB
Text
329 lines
5.7 KiB
Text
/dts-v1/;
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#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/mips/lantiq_rcu_gphy.h>
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/ {
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compatible = "buffalo,wbmr-300hpd", "lantiq,xway", "lantiq,vr9";
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model = "Buffalo WBMR-300HPD";
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chosen {
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bootargs = "console=ttyLTQ0,115200";
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};
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aliases {
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led-boot = &power_g;
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led-failsafe = &diag_r;
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led-running = &power_g;
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led-dsl = &dsl;
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led-internet = &router_g;
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led-wifi = &wifi_g;
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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gpio_poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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power {
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label = "power";
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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auto {
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label = "auto";
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gpios = <&gpio 48 GPIO_ACTIVE_HIGH>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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router {
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label = "router";
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gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
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linux,code = <BTN_1>;
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linux,input-type = <EV_SW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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diag_r: diag_r {
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label = "wbmr300:red:diag";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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default_state = "off";
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};
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wifi_g: wifi_g {
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label = "wbmr300:green:wifi";
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gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
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};
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dsl: dsl {
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label = "dsl";
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gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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};
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router_y: router_y {
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label = "wbmr300:yellow:router";
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gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
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};
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wifi_y: wifi_y {
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label = "wbmr300:yellow:wifi";
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gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
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};
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lan1: lan1 {
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label = "wbmr300:green:lan1";
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gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
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};
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wan: wan {
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label = "wbmr300:green:wan";
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gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
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};
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lan3: lan3 {
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label = "wbmr300:green:lan3";
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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};
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lan2: lan2 {
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label = "wbmr300:green:lan2";
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gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
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};
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internet_g: internet_g {
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label = "wbmr300:green:internet";
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gpios = <&gpio 34 GPIO_ACTIVE_HIGH>;
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};
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internet_y: internet_y {
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label = "wbmr300:yellow:internet";
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gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
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};
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router_g: router_g {
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label = "wbmr300:green:router";
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gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
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};
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power_g: power_g {
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label = "wbmr300:green:power";
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gpios = <&gpio 49 GPIO_ACTIVE_HIGH>;
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};
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "USB_VBUS";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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lantiq,switch;
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "mii";
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phy-handle = <&phy13>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "mii";
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phy-handle = <&phy14>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "mii";
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phy-handle = <&phy11>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <3>;
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phy-mode = "mii";
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phy-handle = <&phy12>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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reg = <0>;
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy12: ethernet-phy@12 {
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reg = <0x12>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy14: ethernet-phy@14 {
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reg = <0x14>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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&gphy0 {
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lantiq,gphy-mode = <GPHY_MODE_FE>;
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};
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&gphy1 {
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lantiq,gphy-mode = <GPHY_MODE_FE>;
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};
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&gpio {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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phy-rst {
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lantiq,pins = "io42";
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lantiq,pull = <0>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io38";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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&spi {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <4 0>;
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spi-max-frequency = <20000000>;
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partition@0 {
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reg = <0x0 0x10000>;
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label = "u-boot";
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read-only;
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};
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partition@10000 {
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reg = <0x10000 0x10000>;
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label = "gphyfirmware";
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read-only;
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};
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partition@20000 {
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reg = <0x20000 0x80000>;
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label = "dsl_fw";
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};
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partition@de0000 {
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reg = <0xa0000 0xf40000>;
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label = "firmware";
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};
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partition@fe0000 {
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reg = <0xfe0000 0x10000>;
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label = "sysconfig";
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read-only;
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};
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partition@ff0000 {
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reg = <0xff0000 0x2000>;
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label = "ubootconfig";
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};
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partition@ff3000 {
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reg = <0xff3000 0x2000>;
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label = "board_config";
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read-only;
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};
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};
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};
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&usb_phy0 {
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status = "okay";
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phy-supply = <&usb_vbus>;
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};
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&usb_phy1 {
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status = "okay";
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phy-supply = <&usb_vbus>;
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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