openwrtv3/target/linux/brcm63xx/patches-4.4/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch
Jonas Gorski b43c190079 brcm63xx: probe SPI connected switches through DT
Now that we can configure the switches through DT, do so.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
2017-06-10 12:40:38 +02:00

216 lines
5.3 KiB
Diff

From cc99dca188bb63ba390008e2f7fa62d0300233e0 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Fri, 20 Feb 2015 23:58:54 +0100
Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
arch/mips/bcm63xx/boards/board_common.c | 2 +
arch/mips/bcm63xx/gpio.c | 147 +++++++------------------------
arch/mips/bcm63xx/setup.c | 3 -
3 files changed, 33 insertions(+), 119 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -189,6 +189,8 @@ int __init board_register_devices(void)
}
#endif
+ bcm63xx_gpio_init();
+
if (board.has_uart0)
bcm63xx_uart_register(0);
--- a/arch/mips/bcm63xx/gpio.c
+++ b/arch/mips/bcm63xx/gpio.c
@@ -5,147 +5,62 @@
*
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
* Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
*/
#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
#include <linux/platform_device.h>
+#include <linux/gpio/driver.h>
#include <linux/gpio.h>
#include <bcm63xx_cpu.h>
#include <bcm63xx_gpio.h>
-#include <bcm63xx_io.h>
#include <bcm63xx_regs.h>
-static u32 gpio_out_low_reg;
-
-static void bcm63xx_gpio_out_low_reg_init(void)
+static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
{
- switch (bcm63xx_get_cpu_id()) {
- case BCM6345_CPU_ID:
- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
- break;
- default:
- gpio_out_low_reg = GPIO_DATA_LO_REG;
- break;
- }
-}
-
-static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
-static u32 gpio_out_low, gpio_out_high;
+ struct resource res[2];
+ struct bgpio_pdata pdata;
-static void bcm63xx_gpio_set(struct gpio_chip *chip,
- unsigned gpio, int val)
-{
- u32 reg;
- u32 mask;
- u32 *v;
- unsigned long flags;
-
- if (gpio >= chip->ngpio)
- BUG();
-
- if (gpio < 32) {
- reg = gpio_out_low_reg;
- mask = 1 << gpio;
- v = &gpio_out_low;
- } else {
- reg = GPIO_DATA_HI_REG;
- mask = 1 << (gpio - 32);
- v = &gpio_out_high;
- }
-
- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
- if (val)
- *v |= mask;
- else
- *v &= ~mask;
- bcm_gpio_writel(*v, reg);
- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
-}
+ memset(res, 0, sizeof(res));
+ memset(&pdata, 0, sizeof(pdata));
-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
-{
- u32 reg;
- u32 mask;
+ res[0].flags = IORESOURCE_MEM;
+ res[0].start = bcm63xx_regset_address(RSET_GPIO);
+ res[0].start += dir;
- if (gpio >= chip->ngpio)
- BUG();
+ res[0].end = res[0].start + 3;
- if (gpio < 32) {
- reg = gpio_out_low_reg;
- mask = 1 << gpio;
- } else {
- reg = GPIO_DATA_HI_REG;
- mask = 1 << (gpio - 32);
- }
+ res[1].flags = IORESOURCE_MEM;
+ res[1].start = bcm63xx_regset_address(RSET_GPIO);
+ res[1].start += data;
- return !!(bcm_gpio_readl(reg) & mask);
-}
+ res[1].end = res[1].start + 3;
-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
- unsigned gpio, int dir)
-{
- u32 reg;
- u32 mask;
- u32 tmp;
- unsigned long flags;
-
- if (gpio >= chip->ngpio)
- BUG();
-
- if (gpio < 32) {
- reg = GPIO_CTL_LO_REG;
- mask = 1 << gpio;
- } else {
- reg = GPIO_CTL_HI_REG;
- mask = 1 << (gpio - 32);
- }
-
- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
- tmp = bcm_gpio_readl(reg);
- if (dir == BCM63XX_GPIO_DIR_IN)
- tmp &= ~mask;
- else
- tmp |= mask;
- bcm_gpio_writel(tmp, reg);
- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+ pdata.base = id * 32;
+ pdata.ngpio = ngpio;
- return 0;
+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+ &pdata, sizeof(pdata));
}
-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+int __init bcm63xx_gpio_init(void)
{
- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
-}
+ int ngpio = bcm63xx_gpio_count();
+ int data_low_reg;
-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
- unsigned gpio, int value)
-{
- bcm63xx_gpio_set(chip, gpio, value);
- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
-}
+ if (BCMCPU_IS_6345())
+ data_low_reg = GPIO_DATA_LO_REG_6345;
+ else
+ data_low_reg = GPIO_DATA_LO_REG;
+ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
-static struct gpio_chip bcm63xx_gpio_chip = {
- .label = "bcm63xx-gpio",
- .direction_input = bcm63xx_gpio_direction_input,
- .direction_output = bcm63xx_gpio_direction_output,
- .get = bcm63xx_gpio_get,
- .set = bcm63xx_gpio_set,
- .base = 0,
-};
+ if (ngpio <= 32)
+ return 0;
-int __init bcm63xx_gpio_init(void)
-{
- bcm63xx_gpio_out_low_reg_init();
+ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
- if (!BCMCPU_IS_6345())
- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
+ return 0;
- return gpiochip_add(&bcm63xx_gpio_chip);
}
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
int __init bcm63xx_register_devices(void)
{
- /* register gpiochip */
- bcm63xx_gpio_init();
-
return board_register_devices();
}